ATMEGA64RZAV-10MU Atmel, ATMEGA64RZAV-10MU Datasheet - Page 45

MCU ATMEGA644/AT86RF230 44-QFN

ATMEGA64RZAV-10MU

Manufacturer Part Number
ATMEGA64RZAV-10MU
Description
MCU ATMEGA644/AT86RF230 44-QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10MU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
44-VFQFN Exposed Pad
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
8 Functional Description
8.1 Introduction - Frame Format
Figure 8-1 IEEE 802.15.4-2003 Frame Format – PHY Layer Frame Structure
Figure 8-2 IEEE 802.15.4-2003 Frame Format – MAC Layer Frame Structure
8.1.1 PHY Protocol Layer Data Unit (PPDU)
8.1.1.1 Synchronization Header (SHR)
5131E-MCU Wireless-02/09
Figure 8-1 provides an overview of the physical layer frame structure as defined by the
IEEE 802.15.4-2003 standard. Figure 8-2 shows details of the defined MAC layer frame
structure.
The SHR consists of a four-octet preamble field (all zero), followed by a single SFD
octet which has the predefined value 0xA7. When transmitting, the SHR is automatically
generated by the AT86RF230, and prefixed to the frame that has been read from the
Frame Buffer. The transmission of the SHR requires 160 µs (10 symbols). This allows
the microcontroller to initiate a transmission and to start downloading the frame
contents subsequently. Note, that in this case the SPI transfer rate must be equal or
faster than the PHY data rate.
During frame reception, the SHR is used for PHY synchronization purposes. In Basic
Operating Mode an RX_START interrupt is issued 8 µs after detection of the SFD field.
AT86RF230
45

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