MCIMX31LVKN5 Freescale Semiconductor, MCIMX31LVKN5 Datasheet - Page 8

• Manufacturer Part Number: MCIMX31LVKN5
• Description: IC MPU MAP I.MX31L 457-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX31r

Specifications of MCIMX31LVKN5

• Core Processor: ARM11
• Core Size: 32-Bit
• Speed: 532MHz
• Connectivity: 1-Wire, ATA, EBI/EMI, FIR, I²C, MMC/SD, PCMCIA, SIM, SPI, SSI, UART/USART, USB, USB OTG
• Peripherals: DMA, LCD, POR, PWM, WDT
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.22 V ~ 3.3 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 457-MAPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Functional Description and Application Information
8
Mnemonic
WDOG
SDHC
SDMA
Block
UART
SCC
USB
SJC
SIM
SSI
Security
Controller
Module
Secured Digital
Host Controller
Memory Access
Identification
Module
Secure JTAG
Controller
Synchronous
Serial Interface
Universal
Asynchronous
Receiver/Trans
mitter
Universal Serial
Bus—
2 Host
Controllers and
1 OTG
(On-The-Go)
Watchdog Timer
Module
Smart Direct
Subscriber
Block Name
Security
Connectivity
Peripheral
System
Control
Peripheral
Connectivity
Peripheral
Debug
Multimedia
Peripheral
Connectivity
Peripheral
Connectivity
Peripherals
Timer
Peripheral
Functional
Grouping
Table 3. Digital and Analog Modules (continued)
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
The SCC is a hardware component composed of two blocks—the
Secure RAM module, and the Security Monitor. The Secure RAM
provides a way of securely storing sensitive information.
The SDHC controls the MMC (MultiMediaCard), SD (Secure Digital)
memory, and I/O cards by sending commands to cards and
performing data accesses to and from the cards.
The SDMA controller maximizes the system’s performance by
relieving the ARM core of the task of bulk data transfer from memory
to memory or between memory and on-chip peripherals.
The SIM interfaces to an external Subscriber Identification Card. It is
an asynchronous serial interface adapted for Smart Card
communication for e-commerce applications.
The SJC provides debug and test control with maximum security and
provides a flexible architecture for future derivatives or future
multi-cores architecture.
The SSI is a full-duplex, serial port that allows the device to
communicate with a variety of serial devices, such as standard
codecs, Digital Signal Processors (DSPs), microprocessors,
peripherals, and popular industry audio codecs that implement the
inter-IC sound bus standard (I2S) and Intel AC97 standard.
The UART provides serial communication capability with external
devices through an RS-232 cable or through use of external circuitry
that converts infrared signals to electrical signals (for reception) or
transforms electrical signals to signals that drive an infrared LED (for
transmission) to provide low speed IrDA compatibility.
The WDOG module protects against system failures by providing a
method for the system to recover from unexpected events or
programming errors.
• USB Host 1 is designed to support transceiverless connection to
• USB Host 2 is designed to support transceiverless connection to
• The USB-OTG controller offers HS/FS/LS capabilities in Host
the on-board peripherals in Low Speed and Full Speed mode, and
connection to the ULPI (UTMI+ Low-Pin Count) and Legacy Full
Speed transceivers.
the Cellular Modem Baseband Processor.
mode and HS/FS in device mode. In Host mode, the controller
supports direct connection of a FS/LS device (without external
hub). In device (bypass) mode, the OTG port functions as gateway
between the Host 1 Port and the OTG transceiver.
Brief Description
Freescale Semiconductor
4.3.23/104
4.3.19/89
4.3.20/90
4.3.21/94
4.3.22/96
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