MCIMX31LVKN5 Freescale Semiconductor, MCIMX31LVKN5 Datasheet - Page 76

• Manufacturer Part Number: MCIMX31LVKN5
• Description: IC MPU MAP I.MX31L 457-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX31r

Specifications of MCIMX31LVKN5

• Core Processor: ARM11
• Core Size: 32-Bit
• Speed: 532MHz
• Connectivity: 1-Wire, ATA, EBI/EMI, FIR, I²C, MMC/SD, PCMCIA, SIM, SPI, SSI, UART/USART, USB, USB OTG
• Peripherals: DMA, LCD, POR, PWM, WDT
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.22 V ~ 3.3 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 457-MAPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

IP27 Read system cycle time
IP28 Write system cycle time
IP29 Read low pulse width
IP30 Read high pulse width
IP31 Write low pulse width
IP32 Write high pulse width
IP33 Controls setup time for read
IP34 Controls hold time for read
IP35 Controls setup time for write
Electrical Characteristics
76
DISPB_RD (ENABLE_L)
DISPB_DATA[17]
(ENABLE_H)
ID
DISPB_PAR_RS
DISPB_D#_CS
DISPB_WR
(READ/WRITE)
DISPB_DATA
(Input)
DISPB_DATA
(Output)
Parameter
Figure 60. Asynchronous Parallel System 68k Interface (Type 2) Timing Diagram
Table 50. Asynchronous Parallel Interface Timing Parameters—Access Level
Symbol
Tcycw
Tdcsw
Tdcsr
Tdchr
Tcycr
IP37
Twh
IP46,IP44
Trh
Twl
Trl
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
IP35,IP33
IP47
Tdicpr–1.5
Tdicpw–1.5
Tdicdr–Tdicur–1.5
Tdicpr–Tdicdr+Tdicur–1.5 Tdicpr–Tdicdr+
Tdicdw–Tdicuw–1.5
Tdicpw–Tdicdw+
Tdicuw–1.5
Tdicur–1.5
Tdicpr–Tdicdr–1.5
Tdicuw–1.5
IP45, IP43
IP39
IP31, IP29
Min.
IP42, IP41
Read Data
read point
IP28, IP27
Tdicdr
Tdicdw
Tdicur
Tdicpr–Tdicdr
Tdicuw
Tdicpr
Tdicpw
Tdicur
Tdicpw–Tdicdw+
Tdicuw
2
4
Typ.
3
–Tdicur
6
–Tdicuw
IP38
1
5
7
IP36, IP34
Tdicpr+1.5
Tdicpw+1.5
Tdicdr–Tdicur+1.5
Tdicpr–Tdicdr+Tdicur+1.5
Tdicdw–Tdicuw+1.5
Tdicpw–Tdicdw+
Tdicuw+1.5
IP32, IP30
IP40
Freescale Semiconductor
Max.
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns