MCF5282CVF80 Freescale Semiconductor, MCF5282CVF80 Datasheet - Page 438

IC MPU 32BIT 66MHZ 256-MAPBGA

MCF5282CVF80

Manufacturer Part Number
MCF5282CVF80
Description
IC MPU 32BIT 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVF80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Digital Ic Case Style
MAPBGA
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF528x
Maximum Speed
80 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
150
Interface Type
CAN/Ethernet/I2C/QSPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
12
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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UART Modules
Using a 80-MHz internal bus clock and letting baud rate equal 9600, then
Therefore, UBG1n equals 0x01 and UBG2n equals 0x04.
23.4.1.2.2
An external source clock (DTINn) passes through a divide-by-1 or 16 prescaler. If f
frequency, baud rate can be described with this equation:
23.4.2
Figure 23-18
operating registers, which are described generally in the following sections. For detailed descriptions, refer
to
23.4.2.1
The transmitter is enabled through the UART command register (UCRn). When it is ready to accept a
character, UART sets USRn[TXRDY]. The transmitter converts parallel data from the CPU to a serial bit
stream on UTXDn. It automatically sends a start bit followed by the programmed number of data bits, an
23-18
Section 23.3, “Memory Map/Register
UARTn
Transmit Buffer
(2 Registers)
Transmitter and Receiver Operating Modes
(UTBn)
Transmitter
is a functional block diagram of the transmitter and receiver showing the command and
UART
External Clock
UART Receive
Divider
Buffer (URBn)
(4 Registers)
Figure 23-18. Transmitter and Receiver Functional Diagram
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
=
------------------------------ -
[
32 x 9600
80MHz
Receiver Holding Register 1
UART Command Register (UCRn)
UART Mode Register 1 (UMR1n)
UART Mode Register 2 (UMR2n)
UART Status Register (USRn)
Transmitter Holding Register
Receiver Holding Register 2
Transmitter Shift Register
]
Baudrate
=
Definition.”
Receiver Holding Register 3
260 decimal
Receiver Shift Register
(
=
-------------------- -
(16 or 1)
f
extc
)
=
0x0104 hexadecimal
(
R/W
R/W
R
W
W
R
)
FIFO
extc
Freescale Semiconductor
is the external clock
Interface
UTXDn
External
URXDn
Eqn. 23-2
Eqn. 23-3

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