MCF5282CVF80 Freescale Semiconductor, MCF5282CVF80 Datasheet - Page 186

• Manufacturer Part Number: MCF5282CVF80
• Description: IC MPU 32BIT 66MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Digital Ic Case Style: MAPBGA
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF528x
• Maximum Speed: 80 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 150
• Interface Type: CAN/Ethernet/I2C/QSPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 12
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Clock Module
A special loss-of-clock condition occurs when both the reference and the PLL fail. The failures may be
simultaneous, or the PLL may fail first. In either case, the reference clock failure takes priority and the
PLL attempts to operate in SCM. If successful, the PLL remains in SCM until the next reset. If the PLL
cannot operate in SCM, the system remains static until the next reset. Both the reference and the PLL must
be functioning properly to exit reset.
9.7.4.11 Loss of Clock in Stop Mode
Table 9-10
by the various clocking methods.
9-16
EXT
NRM
NRM
MODE
In
shows the resulting actions for a loss of clock in Stop Mode when the device is being clocked
X X X X
0 0 0 Off Off 0 Lose lock,
X 0 0 Off Off 1 Lose lock,
X
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
X
Table 9-10. Stop Mode Operation (Sheet 1 of 5)
f.b. clock,
reference
clock
f.b. clock,
reference
clock
Expected
Action at
Stop
PLL
—
Lose reference
clock
Regain
No regain
Regain clocks, but
don’t regain lock
No reference
clock regain
No f.b. clock
regain
During Stop
PLL Action
—
EXT
Stuck
NRM
Stuck
SCM–>
unstable
NRM
SCM–>
Stuck
MODE
Out
0
‘LK
0–>‘L
K
0–>
—
—
—
0
1
0–>
1
0–>
—
—
—
0
‘LC
1–>‘L
C
1–>
—
—
—
Freescale Semiconductor
Block LOCS and
LOCKS until
clock and lock
respectively
regain; enter
SCM regardless
of LOCEN bit
until reference
regained
Block LOCS and
LOCKS until
clock and lock
respectively
regain; enter
SCM regardless
of LOCEN bit
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