MCF5282CVF80 Freescale Semiconductor, MCF5282CVF80 Datasheet - Page 432
MCF5282CVF80
Manufacturer Part Number
MCF5282CVF80
Description
IC MPU 32BIT 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Digital Ic Case Style
MAPBGA
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF528x
Maximum Speed
80 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
150
Interface Type
CAN/Ethernet/I2C/QSPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
12
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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UART Modules
23.3.7
The transmit buffers consist of the transmitter holding register and the transmitter shift register. The
holding register accepts characters from the bus master if UART’s USRn[TXRDY] is set. A write to the
transmit buffer clears USRn[TXRDY], inhibiting any more characters until the shift register can accept
more data. When the shift register is empty, it checks if the holding register has a valid character to be sent
(TXRDY = 0). If there is a valid character, the shift register loads it and sets USRn[TXRDY] again. Writes
to the transmit buffer when the UART’s TXRDY is cleared and the transmitter is disabled have no effect
on the transmit buffer.
Figure 23-9
23.3.8
The UIPCRs hold the current state and the change-of-state for UCTSn.
23-12
IPSBAR
IPSBAR
IPSBAR
Offset:
Offset:
Offset:
Reset:
Reset:
Reset:
W
W
W
R
R
R
UART Transmit Buffers (UTBn)
UART Input Port Change Registers (UIPCRn)
shows UTBn. TB contains the character in the transmit buffer.
0x00_020C (URB0)
0x00_024C (URB1)
0x00_028C (URB2)
0x00_020C (UTB0)
0x00_024C (UTB1)
0x00_028C (UTB2)
0x00_0210 (UIPCR0)
0x00_0250 (UIPCR1)
0x00_0290 (UIPCR2)
1
0
0
0
7
7
7
Figure 23-10. UART Input Port Changed Registers (UIPCRn)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
6
1
6
0
6
0
0
Figure 23-9. UART Transmit Buffer (UTBn)
Figure 23-8. UART Receive Buffer (URBn)
1
0
0
0
5
5
5
COS
1
0
0
4
4
4
RB
TB
1
0
1
1
3
3
3
1
0
1
1
2
2
2
Access: User write-only
Access: User read-only
Access: User read-only
Freescale Semiconductor
1
0
1
1
1
1
1
UCTSn
CTS
1
0
0
0
0
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