MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 335

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

To minimize bus utilization (descriptor fetches), it is recommended that EMRBR be greater than or equal
to 256 bytes.
The EMRBR register is undefined at reset and must be initialized by the user.
17.5
This section describes the operation of the FEC, beginning with the buffer descriptors, the hardware and
software initialization sequence, then the software (Ethernet driver) interface for transmitting and
receiving frames.
Following the software initialization and operation sections are sections providing a detailed description
of the functions of the FEC.
17.5.1
This section provides a description of the operation of the driver/DMA via the buffer descriptors. It is
followed by a detailed description of the receive and transmit descriptor fields.
17.5.1.1
The data for the FEC frames resides in one or more memory buffers external to the FEC. Associated with
each buffer is a buffer descriptor (BD), which contains a starting address (32-bit aligned pointer), data
length, and status/control information (which contains the current state for the buffer). To permit
maximum user flexibility, the BDs are also located in external memory and are read by the FEC DMA
engine.
Freescale Semiconductor
R_BUF_SIZE
31–11
Field
10–4
3–0
IPSBAR
Offset:
Reset — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — —
Functional Description
W
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Buffer Descriptors
Reserved, must be cleared.
Maximum size of receive buffer size in bytes. To minimize bus utilization (descriptor fetches), set this field to 256
bytes (0x10) or larger.
0x10 256 + 15 bytes (minimum size recommended)
0x11 272 + 15 bytes
...
0x7F 2032 + 15 bytes. The FEC writes up to 2047 bytes in the receive buffer. If data larger than 2047 is
Reserved, must be cleared.
Driver/DMA Operation with Buffer Descriptors
0x1188
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
received, the FEC truncates it and shows 0x7FF in the receive descriptor
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 17-24. Receive Buffer Size Register (EMRBR)
Table 17-28. EMRBR Field Descriptions
Description
R_BUF_SIZE
8
7
Access: User read/write
Fast Ethernet Controller (FEC)
6
5
4
0 0 0
3
2
1
0
0
17-25