MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 265

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2.6.14 Receive Error (ERXER)
ERXER is an input signal which when asserted along with ERXDV signals that the PHY has detected an
error in the current frame. When ERXDV is not asserted ERXER has no effect, and applies to MII mode
operation.
These pins can also be configured as GPIO PEL0.
14.2.7
14.2.7.1 QSPI Synchronous Serial Output (QSPI_DOUT)
The QSPI_DOUT output provides the serial data from the QSPI and can be programmed to be driven on
the rising or falling edge of QSPICLK. Each byte is sent msb first.
This pin can also be configured as GPIO PQS0.
14.2.7.2 QSPI Synchronous Serial Data Input (QSPI_DIN)
The QSPI_DIN input provides the serial data to the QSPI and can be programmed to be sampled on the
rising or falling edge of QSPICLK. Each byte is written to RAM lsb first.
This pin can also be configured as GPIO PQS1.
14.2.7.3 QSPI Serial Clock (QSPI_CLK)
The QSPI serial clock (QSPI_CLK) provides the serial clock from the QSPI. The polarity and phase of
QSPI_CLK are programmable. The output frequency is programmed according to the following formula,
in which n can be any value between 2 and 255: QSPI_CLK = CLKOUT/(2n).
This pin can also be configured as GPIO PQS2.
14.2.7.4 QSPI Chip Selects (QSPI_CS[3:0])
The synchronous peripheral chip selects (QSPI_CS[3:0]) outputs provide QSPI peripheral chip selects that
can be programmed to be active high or low.
This pin can also be configured as GPIO PQS[6:3].
14.2.8
14.2.8.1 FlexCAN Transmit (CANTX)
Controller Area Network Transmit data output.
This pin can also be configured as GPIO PAS2.
14.2.8.2 FlexCAN Receive (CANRX)
Controller Area Network Transmit data input.
This pin can also be configured as GPIO PAS3.
Freescale Semiconductor
Queued Serial Peripheral Interface (QSPI) Signals
FlexCAN Signals
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Signal Descriptions
14-25