MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 251

IC MPU 32BIT COLDF 256-MAPBGA

MCF5214CVF66

Manufacturer Part Number
MCF5214CVF66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5214CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
142
Interface Type
QSPI/UART/I2C/CAN
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number:
MCF5214CVF66
Manufacturer:
Freescale Semiconductor
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10 000
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MCF5214CVF66J
Manufacturer:
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Freescale Semiconductor
MAPBGA Pin
R11
R14
P11
T14
T11
R8
N7
H1
K2
K3
K1
T8
J4
J2
TEST
TCK
TIP
TS
UCTS[1:0]
URTS[1:0]
URXD[2:0]
UTXD[2:0]
XTAL
Abbreviation
Table 14-3. MCF5282 Signals and Pin Numbers Sorted by Function
CLKMOD0
CLKMOD1
Primary
CLKOUT
Table 14-2. MCF5282 Alphabetical Signal Index (continued)
EXTAL
RCON
RSTO
XTAL
RSTI
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
D26
D17
D16
D19
D18
D21
2
Reserved, should be connected to VSS.
JTAG test logic clock.
Asserted to indicate that a bus transfer is in progress. Negated
during idle bus cycles.
Asserted during the first CLKOUT cycle of a transfer when
address and attributes are valid.
Signals UART that it can begin data transmission.
Automatic UART request to send outputs.
Receiver serial data inputs.
Transmitter serial data outputs.
Internal oscillator connection to the external crystal.
Pin Functions
Secondary
Chip Configuration/Mode Selection
PB1
PB0
PB3
PB2
PB5
PA2
Tertiary
Reset
Clock
Function
Reset in
Reset out
External clock/crystal in
Crystal drive
Clock out
Clock mode select
Clock mode select
Reset configuration enable
Chip mode
Chip mode
Chip mode
Boot device/data port size
Boot device/data port size
Output pad drive strength
Description
Primary
I/O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
Signal Descriptions
O
O
O
I
I
I
I
I
Pull-up
Internal
Yes
Yes
Yes
Yes
14-11
1

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