DLP-USB232M-G DLP Design Inc, DLP-USB232M-G Datasheet - Page 3

• Manufacturer Part Number: DLP-USB232M-G
• Description: MODULE USB-TO-TTL SRL UART CONV
• Manufacturer: DLP Design Inc
• Series: DLP-USB232Mr

Specifications of DLP-USB232M-G

• Convert From (adapter End): USB
• Convert To (adapter End): DB9 Female
• Features: Integrated 6MHz-48MHz clock multiplier PLL
• Interface Type: USB
• Data Bus Width: 8 bit
• Product: Interface Modules
• For Use With/related Products: Windows® 98 or higher, Mac OS 8.5 or higher
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 813-1018

• TXDEN Timing fix
TXDEN timing has now been fixed to remove the external
delay that was previously required for RS485 applications
at high baud rates. TXDEN now works correctly during a
transmit send-break condition.
• Improved PreScaler Granularity
The previous version of the Prescaler supported division
by ( n + 0 ), ( n + 0.125 ), ( n + 0.25 ) and ( n + 0.5 )
where n is an integer between 2 and 16,384 ( 214 ). To
these have been added ( n + 0.375 ), ( n + 0.625 ), ( n
+ 0.75 ) and ( n+ 0.875 ) which can be used to improve
the accuracy of some baud rates and generate new baud
rates which were previously impossible ( especially with
higher baud rates ).
• PreScaler Divide By 1 Fix
The previous device had a problem when the integer part
of the divisor was set to 1. In the 2nd generation device,
setting the prescaler value to 1 gives a baud rate of 2
million baud and setting it to zero gives a baud rate of 3
million baud. Non-integer division is not supported with
divisor values of 0 and 1.
• Bit Bang Mode
The 2nd generation device has a new option referred to
as “Bit Bang” mode. In Bit Bang mode, the eight UART
interface control lines can be switched between UART
interface mode and an 8-bit Parallel IO port. Data packets
can be sent to the device and they will be sequentially
sent to the interface at a rate controlled by the prescaler
setting. As well as allowing the device to be used stand-
alone as a general purpose IO controller for example
controlling lights, relays and switches, some other
interesting possibilities exist. For instance, it may be
possible to connect the device to an SRAM configurable
Copyright © DLP Design 2002
FPGA as supplied by vendors such as Altera and Xilinx.
The FPGA device would normally be un-configured ( i.e.
have no defined function ) at power-up.
Application software on the PC could use Bit Bang Mode
to download configuration data to the FPGA which would
define it’s hardware function, then after the FPGA device
is configured the FT232BM can switch back into UART
interface mode to allow the programmed FPGA device
to communicate with the PC over USB. This approach
allows a customer to create a “generic” USB peripheral
whose hardware function can be defined under control of
the application software. The FPGA based hardware can
be easily upgraded or totally changed simply by changing
the FPGA configuration data file. Application notes,
software and development modules for this application
area will be available from FTDI and other 3rd party
developers.
• USB 2.0 (full speed option)
A new EEPROM based option allows the FT232BM to
return a USB 2.0 device descriptor as opposed to USB
1.1. Note: The device would be a USB 2.0 Full Speed
device (12Mb/s) as opposed to a USB 2.0 High Speed
device (480Mb/s).
DLP-USB232M User’s Manual
Page 3 of 12