W90N740CDG Nuvoton Technology Corporation of America, W90N740CDG Datasheet - Page 90

• Manufacturer Part Number: W90N740CDG
• Description: IC MCU ARM7 TDMI 176-LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W90r

Specifications of W90N740CDG

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, Ethernet, UART/USART, USB
• Peripherals: DMA, POR, WDT
• Number Of I /o: 21
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

MAC Missed Packet Count register (MPCNT_0, MPCNT_1)
The value in the MAC Missed Packet Count register (MPCNT) indicates the number of packets that were
discarded due to various types of errors. Together with status information on packets transmitted and
received, the MPCNT and these two pause count registers provide the information required for station
management.
Users can read the MPCNT to get current missed packet counter value and clears the register (read
clear). It is the responsibility of software to maintain a global count with more bits of precision.
However, users can write the MPCNT to set the initial value of counter overflow and start to count.
The counter overflow value ranges from 0x0000 to 0xFFFF (default value: 0x7FFF). It sets the
corresponding bit (MMP) in the MISTA and generates an interrupt if overflow is occurred and the
corresponding interrupt enable bit is set.
MPCNT [15:0]: MAC Missed Packet Count
Default value: 0x7FFF
It indicates the number of packets that were discarded due to various types of errors.
This counter indicates the following kinds of error:
Dribbling Bits error count (AECnt): The number of packets received with alignment errors. The
Frame discarded error count (RXFDCnt): The number of packets discarded by MAC because of
CRC error count (CECnt): The number of packets received with a CRC error. The counter will be
MPCNT_0
MPCNT_1
REGISTER
31
23
15
7
counter will be increment at the end of packet reception if the MISTA indicates the
alignment errors.
receive FIFO overflows, or because the RxON bit is cleared. This count does not include
the number of packets rejected by the CAM.
increment at the end of packet reception if the MISTA indicates the CRC errors.
0xFFF0.3098
0xFFF0.3898
ADDRESS
30
22
14
6
29
21
13
5
R/W
R/W
R/W
Missed Packet counter register
Missed Packet counter register
28
20
12
4
Reserved
Reserved
MPCNT
MPCNT
- 87 -
W90N740CD/W90N740CDG
DESCRIPTION
27
19
11
3
Publication Release Date: Aug. 18, 2005
26
18
10
2
25
17
9
1
RESET VALUE
0x0000.7FFF
0x0000.7FFF
Revision A6
24
16
8
0