W90N740CDG Nuvoton Technology Corporation of America, W90N740CDG Datasheet - Page 58

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W90N740CDG

Manufacturer Part Number
W90N740CDG
Description
IC MCU ARM7 TDMI 176-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
W90r
Datasheet

Specifications of W90N740CDG

Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, Ethernet, UART/USART, USB
Peripherals
DMA, POR, WDT
Number Of I /o
21
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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DLH_CLK_SKEW [7:4] :Data latch clock skew adjustment
Note: P-x means Data latched Clock shift “X” gates delays by refer MCLKO positive edge,
MCLK_O_D [3:0] :MCLK output delay adjustment
Note: P-x means MCLKO shift “X” gates delay by refer HCLK positive edge,
0
0
0
0
0
0
0
0
0
0
0
0
0
0
N-x means MCLKO shift “X” gates delay by refer HCLK negative edge.
MCLK is the output pin of MCLKO, which is a internal signal on chip.
N-x means Data latched Clock shift “X” gates delays by refer MCLKO negative edge.
DLH_CLK_SKEW [7:4]
MCLK_O_D [3:0]
0
0
0
0
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
DELAY
DELAY
GATE
GATE
P-0
P-1
P-2
P-3
P-4
P-5
P-6
P-0
P-1
P-2
P-3
P-4
P-5
P-6
- 55 -
W90N740CD/W90N740CDG
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DLH_CLK_SKEW [7:4]
MCLK_O_D [3:0]
Publication Release Date: Aug. 18, 2005
0
0
0
0
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
DELAY
DELAY
Revision A6
GATE
GATE
N-0
N-1
N-2
N-3
N-4
N-5
N-6
N-0
N-1
N-2
N-3
N-4
N-5
N-6

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