W90N740CDG Nuvoton Technology Corporation of America, W90N740CDG Datasheet - Page 13

• Manufacturer Part Number: W90N740CDG
• Description: IC MCU ARM7 TDMI 176-LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W90r

Specifications of W90N740CDG

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, Ethernet, UART/USART, USB
• Peripherals: DMA, POR, WDT
• Number Of I /o: 21
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

6. PIN DESCRIPTION
Table 6.1 W90N740 Pins Description
System Clock & Reset
TAP Interface
External Bus Interface
PIN NAME
EXTAL
XTAL
MCLK
nRESET
TCK
TMS
TDI
TDO
nTRST
A [24:22]
A [21:0]
D [31:16]
D [15:0]
nWBE [3:0]/
SDQM [3:0]
nSCS [1:0]
nSRAS
nSCAS
nSWE
MCKE
EMREQ
EMACK
nWAIT
nBTCS
nECS [3:0]
nOE
IO TYPE
ID
IU
IU
IU
IO
IO
IO
IO
ID
IU
IO
O
O
O
O
O
O
O
O
O
O
O
O
I
I
internal pull-down
internal pull-
down
internal pull-up
internal pull-up
internal pull-up
internal pull-up
PAD TYPE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
External Clock / Crystal Input
Crystal Output
System Master Clock Out, SDRAM clock
System Reset, active-low
JTAG Test Clock,
JTAG Test Mode Select,
JTAG Test Data in,
JTAG Test Data out
JTAG Reset, active-low,
Address Bus (MSB) of external memory and IO devices
Address Bus of external memory and IO devices
Data Bus (MSB) of external memory and IO device,
Data Bus (LSB) of external memory and IO device
Write Byte Enable for specific device(nECS[3:0]),
Data input/output Mask signal for SDRAM (nSCS[1:0]),
active-low These pins are always Output in normal mode,
and Input type in internal SRAM test mode.
SDRAM chip select for two external banks, active-low.
Row Address Strobe for SDRAM, active-low
Column Address Strobe for SDRAM, active-low
SDRAM Write Enable, active-low
SDRAM Clock Enable, active-high
External Master Bus Request
This is used to request external bus. When EMACK active,
indicates the bus grants the bus, chip drives all the output
pins of the external bus to high impedance.
External Bus Acknowledge
External Wait, active-low
ROM/Flash Chip Select, active-low
External I/O Chip Select, active-low.
ROM/Flash, External Memory Output Enable, active-low
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W90N740CD/W90N740CDG
DESCRIPTION