ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 51

• Manufacturer Part Number: ADUC7032BSTZ-8V-RL
• Description: IC BATTERY SENSOR PREC 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-8V-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: ADUC7032BSTZ-8V-RLCT

Preliminary Technical Data
ADC Mode Register :
Name :
Address :
Default Value :
Access :
Function :
Bit
7
6
5
4-3
2-0
Description
Not Used
This bit is reserved for future functionality and be written as 0 by user code
20KΩ resistor select:
This bit is set to 1 to select the 20 KΩ resistor as shown in Figure 18
This bit is set to 0 to select the direct path to ground as shown in Figure 18 ( Default ).
Low Power Mode Reference Select:
This bit is set to 1 to enable the Precision Voltage Reference in ADC Low Power Mode. This will increase current consumption.
This bit is set to 0 to enable the Low Power Voltage Reference in ADC Low Power Mode ( Default ).
ADC Power Mode Configuration
0, 0
0, 1
1, 0
1, 1
ADC Operation Mode Configuration
0, 0, 0 ADC Power-Down Mode
0, 0, 1 ADC Continuous Conversion Mode
0, 1, 0 ADC Single Conversion Mode
0, 1, 1 ADC IDLE Mode
1, 0, 0 ADC Self-Offset Calibration
1, 0, 1 ADC Self Gain Calibration
All ADC circuits (including internal reference) are powered-down
In this mode, any enabled ADC will continuously convert.
In this mode, any enabled ADC will perform a single conversion. The ADC will enter Idle Mode once the single
shot conversion is complete. A single conversion will take 2/3 ADC clock cycles depending on the CHOP mode.
In this Mode, the ADC is fully powered on but is held in RESET
In this mode, an offset calibration is performed on any enabled ADC using an internally generated 0V. The
calibration is carried out at the user programmed ADC settings, therefore, as with a normal
conversion, it will take 2/3 ADC conversion cycles before a fully settled calibration result is ready. The calibration
result is automatically written to the ADCxOF MMR of the respective ADC. The ADC returns to IDLE Mode and the
Calibration and Conversion Ready status bits are set at the end of an offset calibration cycle.
In this mode, a gain calibration against an internal reference voltage is performed on all enabled ADCs. A gain
calibration is a 2 stage process and takes twice the time of an offset calibration. The calibration result is
automatically written to the ADCxGN MMR of the respective ADC. The ADC returns to IDLE Mode and the calibration
and Conversion Ready status bits are set at the end of an gain calibration cycle. An ADC self gain calibration should
only be carried out on the Current Channel ADC while pre-programmed, factory calibration coefficients (downloaded
automatically from internal Flash) should be used for voltage temperature measurements. If an external NTC is used,
an ADC Self Calibration should be done on the temperature channel.
ADC Normal Mode
If enabled, the ADC will operate with normal current consumption yielding optimum electrical performance
ADC Low Power Mode
If enabled, the I-ADC will operate with reduced current consumption. This limitation is current consumption is
achieved, (at the expense of ADC noise performance) by fixing the gain to 128 and using the on-chip low power
(131kHz) oscillator to drive the ADC circuits directly.
ADC Low Power-Plus Mode
If enabled, the ADC will again operate with reduced current consumption. In this mode the gain is fixed to 512 and
the current consumed is 200uA (approx.) more than ADC low Power Mode above. The additional current consumed
also ensures ADC noise performance is better than that achieved in ADC Low Power Mode.
Not Defined
ADCMDE
0xFFFF0508
0x00
Read/Write
The ADC Mode MMR is an 8-bit register that configures the mode .of operation of the ADC sub-system
Table 23 : ADCMDE MMR Bit Designations
Rev. PrD | Page 51 of 128
single ADC
ADuC7032