ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 35
![IC BATTERY SENSOR PREC 48-LQFP](/photos/6/59/65923/505-48-lqfp_sml.jpg)
ADUC7032BSTZ-8V-RL
Manufacturer Part Number
ADUC7032BSTZ-8V-RL
Description
IC BATTERY SENSOR PREC 48-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7032BSTZ-8V-RL.pdf
(128 pages)
Specifications of ADUC7032BSTZ-8V-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
ADUC7032BSTZ-8V-RLCT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7032BSTZ-8V-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Preliminary Technical Data
Block0, Flash/EE Memory Protection Registers :
Name :
Address :
Default Value (both registers) :
Access :
Function :
Bit
31
30
29
28-0
Block1, Flash/EE Memory Protection Registers :
Name :
Address :
Default Value (both registers) :
Access :
Function :
Bit
31
30
29-0
Description (note: x is 0 or 1 to designate Flash/EE Block 0 or 1)
Read protection
Cleared by user to protect the 32kbyte Flash/EE Block code via JTAG read access
Set by user to allow reading the 32kbyte Flash/EE Block code via JTAG read access
Write Protection Bit
This bit is set by user code to unprotect protect page 59
This bit is cleared by user code write protect page 59
Write Protection Bit
This bit is set by user code to unprotect page 58
This bit is cleared by user code write protect page 58
Write Protection Bits
When set by user code these bits will unprotect pages 0-57 of the 30KB Flash/EE code memory. Each bit write protects 2
pages and each pages consists of 512 bytes.
When cleared by user code these bits will write protect pages 0-57 of the 30KB Flash/EE code memory. Each bit write
protects 2 pages and each pages consists of 512 bytes.
Description
Read protection
Cleared by user to protect the 64kbyte Flash/EE Block code via JTAG read access
Set by user to allow reading the 64kbyte Flash/EE Block code via JTAG read access
Read protection
When set by user code these bits will protect pages 120-127 of the 64KB Flash/EE code memory. This bit write protects 8
pages and each page consists of 512 bytes.
When cleared by user code these bits will write protect pages 120-127 of the 64KB Flash/EE code memory.This bit write
protects 8 pages and each page consists of 512 bytes.
Write Protection Bits
When set by user code these bits will unprotect pages 0-119 of the 64KB Flash/EE code memory. Each bit write protects 4
pages and each pages consists of 512 bytes.
When cleared by user code these bits will write protect pages 0-119 of the 64KB Flash/EE code memory. Each bit write
protects 2 pages and each pages consists of 512 bytes.
These registers are written by user code to configure the protection of the Flash/EE memory.
These registers are written by user code to configure the protection of the Flash/EE memory.
FEE0HID and FEE0PRO
0xFFFF0E20 (for FEE0HID) and 0xFFFF0E1C (for FEE0PRO)
0xFFFFFFFF
Read/Write Access
FEE1HID and FEE1PRO
0xFFFF0EA0 (for FEE0HID) and 0xFFFF0E9C (for FEE0PRO)
0xFFFFFFFF
Read/Write Access
Table 14: FEE0HID and FEE0PRO MMR bit designations
Table 15: FEE1HID and FEE1PRO MMR bit designations
Rev. PrD | Page 35 of 128
ADuC7032