ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 100

• Manufacturer Part Number: ADUC7032BSTZ-8V-RL
• Description: IC BATTERY SENSOR PREC 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-8V-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: ADUC7032BSTZ-8V-RLCT

Preliminary Technical Data
High Voltage Configuration0 Register :
Name :
Address :
Default Value :
Access :
Function :
Bit
7
6
5
4
3
2
1-0
Description
Wake Thermal Shutdown Disable:
This bit is set to 1 to disable the automatic shutdown of the Wake driver when a thermal event occurs.
This bit is cleared to 0 to enable the automatic shutdown of the Wake driver when a thermal event occurs.
Precision Oscillator Enable Bit
This bit is set to 1 to enable the Precision, 131kHz oscillator. The oscillator start-up time is typically 70µsecs (including HV
interface latency of 10µsecs)
This bit is cleared to 0 to power down the Precision, 131kHz oscillator
Reserved
This bit is reserved and should be written as 0 by user code.
WU Assert Bit
This bit is set to 1 to assert the external WU pin high.
This bit is cleared to 0 to pull the external WU pin low via an internal 10KΩ pull-down resistor.
PSM Enable Bit
This bit is cleared to 0 to disable the Power Supply (Voltage at the VDD pin) Monitor
This bit is set to 1 to enable the Power Supply (Voltage at the VDD pin) Monitor. If IRQ3 (IRQEN[16] is enabled the PSM will
generate an interrupt if the voltage at the VDD pin drops below 6.0V.
Low Voltage Flag Enable Bit
This bit is cleared to 0 to disable the Low Voltage Flag function
This bit is set to 1 to enable the Low Voltage Flag function. The Low Voltage Flag can be interrogated via HVMON[3] after
power up to determine if the REG_DVDD voltage previously dropped below 2.1V
LIN Operating Mode
These bits enable/disable the LIN driver.
0
0
1
1
0
1
0
1
HVCFG0
Indirectly addressed via the HVCON high voltage interface
0x00
Read/Write
This 8-bit register controls the function of high voltage circuits on the ADuC7032. This register is not an MMR and
does not appear in the MMR memory map. It is accessed via the HVCON registered interface. Data to be written to
this register is loaded via the HVDAT MMR and data is read back from this register via the HVDAT MMR.
LIN Disabled
Reserved – (not LIN V2.0 compliant)
LIN Enabled
Reserved
Table 64: HVCFG0 Bit Designations
Rev. PrD | Page 100 of 128
ADuC7032