ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 110

IC BATTERY SENSOR PREC 48-LQFP

ADUC7032BSTZ-8V-RL

Manufacturer Part Number
ADUC7032BSTZ-8V-RL
Description
IC BATTERY SENSOR PREC 48-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7032BSTZ-8V-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
ADUC7032BSTZ-8V-RLCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7032BSTZ-8V-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
UART Interrupt Enable Register 0:
Name :
Address :
Default Value :
Access :
Function :
Bit
7-3
2
1
0
UART Interrupt Identification Register 0:
Name :
Address :
Default Value :
Access :
Function :
Bit 2-1
Status bits
00
11
10
01
00
Preliminary Datasheet
Name
ELSI
ETBEI
ERBFI
Bit 0
NINT
1
0
0
0
0
COMIEN0
0xFFFF0704
0x00
Read/Write
The 8-bit register enables/disables the individual UART interrupt sources.
COMIID0
0xFFFF0708
0x01
Read Only
This 8-bit register reflects the source of the UART interrupt
Priority
1
2
3
4
Description
Reserved and should be written as zeros
RX status interrupt enable bit
Set by user to enable generation of an interrupt if any of COMSTA0[3:0] are set
Cleared by user
Enable transmit buffer empty interrupt
Set by user to enable interrupt when buffer is empty during a transmission
Cleared by user
Enable receive buffer full interrupt
Set by user to enable interrupt when buffer is full during a reception
Cleared by user
Definition
No interrupt
Receive line status interrupt
Receive buffer full interrupt
Transmit buffer empty interrupt
Reserved
Table 74 : COMIEN0 MMR Bit Descriptions
Table 75 : COMIID0 MMR Bit Descriptions
Rev. PrD | Page 110 of 128
Write data to COMTX or read COMIID0
Clearing operation
Read COMSTA0
Read COMRX
ADuC7032

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