UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 591
UPD70F3785GJ-GAE-AX
Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet
1.UPD70F3778GF-GAT-AX.pdf
(1817 pages)
Specifications of UPD70F3785GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3785GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(n = 0 to 3)
TMnCTL0
After reset: 00H
Cautions 1. Set the TMnCKS2 to TMnCKS0 bits when the TMnCE bit = 0.
Remark
(m = 1 to 3)
TMmCKS2
TMmCKS2
(m = 0)
TMnCE
Internal clock control and internal circuit reset for TMMn are performed asynchronously
using the TMnCE bit. When the TMnCE bit is cleared to 0, the internal clock of TMMn
is disabled (fixed to low level) and 16-bit counter is reset asynchronously.
TMnCE
<7>
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
CHAPTER 10 16-BIT INTERVAL TIMER M (TMM)
2. Be sure to clear bits 3 to 6 to “0”.
f
f
f
XX
R
XT
R/W
TMMn operation disabled (16-bit counter reset asynchronously).
Operation clock application stopped.
TMMn operation enabled. Operation clock application started. TMMn
operation started.
: Internal oscillation clock frequency
TMmCKS1
TMmCKS1
: Subclock frequency
: Main clock frequency
When changing the value of TMnCE from 0 to 1, it is not possible to set
the value of the TMnCKS2 to TMnCKS0 bits simultaneously.
6
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Address: TM0CTL0 FFFFFA80H, TM1CTL0 FFFFFA90H,
Internal clock operation enable/disable specification
User’s Manual U19601EJ2V0UD
TMmCKS0
TMmCKS0
5
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TM2CTL0 FFFFFAA0H, TM3CTL0 FFFFFAB0H
4
0
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
R
XT
XX
XX
XX
XX
XX
XX
XX
XX
/8
/2
/4
/64
/512
/1024
/2
/4
/8
/16
/64
/256
/512
/1024
3
0
Count clock selection
Count clock selection
f
f
XX
XX
= 50 MHz
= 50 MHz
10.24 s
20.48 s
36.36 s
30.52 s
10.24 s
20.48 s
20.0 ns
40.0 ns
80.0 ns
1.28 s
40.0 ns
80.0 ns
1.28 s
5.12 s
160 ns
320 ns
TMnCKS2 TMnCKS1 TMnCKS0
2
μ
μ
μ
μ
μ
μ
μ
μ
μ
f
f
XX
XX
= 48 MHz
21.33 s
36.36 s
30.52 s
= 48 MHz
10.67 s
21.33 s
20.8 ns
41.7 ns
83.3 ns
1.33 s
10.7 s
41.7 ns
83.3 ns
1.33 s
5.33 s
167 ns
333 ns
1
μ
μ
μ
μ
μ
μ
μ
μ
μ
f
f
XX
XX
= 32 MHz
36.36 s
30.52 s
= 32 MHz
0
31.3 ns
62.5 ns
2.00 s
16.0 s
32.0 s
62.5 ns
2.00 s
8.00 s
16.0 s
32.0 s
125 ns
125 ns
250 ns
500 ns
μ
μ
μ
μ
μ
μ
μ
μ
μ
589
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