UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 273

no-image

UPD70F3785GJ-GAE-AX

Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3785GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3785GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(e) TAAn counter read buffer register (TAAnCNT)
(f) TAAn capture/compare register 0 (TAAnCCR0)
(g) TAAn capture/compare register 1 (TAAnCCR1)
The count value of the 16-bit counter can be read by reading the TAAnCNT register.
If D
signal (INTTAAnCC0) is generated when the number of external event counts reaches (D
Usually, the TAAnCCR1 register is not used in the external event count mode. However, the set value of
the TAAnCCR1 register is transferred to the CCR1 buffer register. When the count value of the 16-bit
counter matches the value of the CCR1 buffer register, a compare match interrupt request signal
(INTTAAnCC1) is generated.
Therefore, mask the interrupt signal by using the interrupt mask flag (TAAnCCMK1).
Caution When an external clock is used as the count clock, the external clock can be input only
Remarks 1. TAAn I/O control register 1 (TAAnIOC1) and TAAn option register 0 (TAAnOPT0) are not
0
Figure 7-16. Register Setting for Operation in External Event Count Mode (2/2)
is set to the TAAnCCR0 register, the counter is cleared and a compare match interrupt request
from the TIAAn0 pin. At this time, set the TAAnIOC1.TAAnIS1 and TAAnIOC1.TAAnIS0
bits to 00 (capture trigger input (TIAAn0 pin): no edge detection).
2. n = 0 to 5
used in the external event count mode.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
User’s Manual U19601EJ2V0UD
0
+ 1).
271

Related parts for UPD70F3785GJ-GAE-AX