DF2166VTE33 Renesas Electronics America, DF2166VTE33 Datasheet - Page 319
![MCU FLASH 3V 512K 33MHZ 144TQFP](/photos/28/61/286114/144-tqfp_sml.jpg)
DF2166VTE33
Manufacturer Part Number
DF2166VTE33
Description
MCU FLASH 3V 512K 33MHZ 144TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
- Current page: 319 of 876
- Download datasheet (5Mb)
This LSI has an on-chip 16-bit free-running timer (FRT). The FRT operates on the basis of the 16-
bit free-running counter (FRC), and outputs two independent waveforms, and measures the input
pulse width and external clock periods.
11.1
• Selection of four clock sources
• Two independent comparators
• Four independent input capture channels
• Counter clearing
• Seven independent interrupts
• Special functions provided by automatic addition function
Figure 11.1 shows a block diagram of the FRT.
TIM8FR1A_000120020900
One of the three internal clocks (φ/2, φ/8, or φ/32), or an external clock input can be
Two independent waveforms can be output.
The rising or falling edge can be selected.
Buffer modes can be specified.
The free-running counters can be cleared on compare-match A.
Two compare-match interrupts, four input capture interrupts, and one overflow interrupt
The contents of OCRAR and OCRAF can be added to the contents of OCRA
selected (enabling use as an external event counter).
can be requested independently.
automatically, enabling a periodic waveform to be generated without software intervention.
The contents of ICRD can be added automatically to the contents of OCRDM × 2, enabling
input capture operations in this interval to be restricted.
Features
Section 11 16-Bit Free-Running Timer (FRT)
Rev. 3.00, 03/04, page 277 of 830
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