HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 61

• Manufacturer Part Number: HD6417708RF100A
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708RF100A

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3.15 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Table 2.11 lists the SH7708 Series system control instructions.
Table 2.11 System Control Instructions
Instruction
CLRMAC
CLRS
CLRT
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC.L @Rm+,SR
LDC.L @Rm+,GBR
LDC.L @Rm+,VBR
LDC.L @Rm+,SSR
LDC.L @Rm+,SPC
LDC.L @Rm+,
LDC.L @Rm+,
LDC.L @Rm+,
LDC.L @Rm+,
Rm,SR
Rm,GBR
Rm,VBR
Rm,SSR
Rm,SPC
Rm,R0_BANK
Rm,R1_BANK
Rm,R2_BANK
Rm,R3_BANK
Rm,R4_BANK
Rm,R5_BANK
Rm,R6_BANK
Rm,R7_BANK
R0_BANK
R1_BANK
R2_BANK
R3_BANK
Operation
0
0
0
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
(Rm)
(Rm)
(Rm)
(Rm)
(Rm)
(Rm)
Rm + 4
(Rm)
Rm + 4
(Rm)
Rm + 4
(Rm)
Rm + 4
MACH, MACL
S
T
SR
GBR
VBR
SSR
SPC
R0_BANK
R1_BANK
R2_BANK
R3_BANK
R4_BANK
R5_BANK
R6_BANK
R7_BANK
SR, Rm + 4
GBR, Rm + 4
VBR, Rm + 4
SSR, Rm + 4
SPC, Rm + 4
R0_BANK,
R1_BANK,
R2_BANK,
R3_BANK,
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Rm
Code
0000000000101000
0000000001001000
0000000000001000
0100mmmm00001110
0100mmmm00011110
0100mmmm00101110
0100mmmm00111110
0100mmmm01001110
0100mmmm10001110
0100mmmm10011110
0100mmmm10101110
0100mmmm10111110
0100mmmm11001110
0100mmmm11011110
0100mmmm11101110
0100mmmm11111110
0100mmmm00000111
0100mmmm00010111
0100mmmm00100111
0100mmmm00110111
0100mmmm01000111
0100mmmm10000111
0100mmmm10010111
0100mmmm10100111
0100mmmm10110111
Privileged
Mode
—
—
—
—
—
Cycles T Bit
1
1
1
5
1
1
1
1
1
1
1
1
1
1
1
1
7
1
1
1
1
1
1
1
1
—
—
0
LSB
—
—
—
—
—
—
—
—
—
—
—
—
LSB
—
—
—
—
—
—
—
—
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