HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 342
HD6417708RF100A
Manufacturer Part Number
HD6417708RF100A
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417708SF60V.pdf
(635 pages)
Specifications of HD6417708RF100A
Core Processor
SH-2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3.15 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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HD6417708RF100AV
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12.1.4
Table 12.2 shows the RTC register configuration.
Table 12.2 RTC Registers
Name
64-Hz counter
Second counter
Minute counter
Hour counter
Day of week counter
Date counter
Month counter
Year counter
Second alarm register
Minute alarm register
Hour alarm register
Day of week alarm register RWKAR
Date alarm register
Month alarm register
RTC control register 1
RTC control register 2
Note: Only the ENB bits of each register are initialized.
12.2
12.2.1
The 64-Hz counter (R64CNT) is an 8-bit read-only register that indicates the status of the RTC
divider circuit between 64 Hz and 1 Hz.
R64CNT is reset to H'00 by setting the RESET bit in RTC control register 2 (RCR2) or the ADJ
bit in RCR2 to 1.
322
RTC Register Configuration
RTC Registers
64-Hz Counter (R64CNT)
Abbreviation R/W
R64CNT
RSECCNT
RMINCNT
RHRCNT
RWKCNT
RDAYCNT
RMONCNT
RYRCNT
RSECAR
RMINAR
RHRAR
RDAYAR
RMONAR
RCR1
RCR2
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined*
Undefined*
Undefined*
Undefined*
Undefined*
Undefined*
H'00
H'09
Address
H'FFFFFEC0
H'FFFFFEC2
H'FFFFFEC4
H'FFFFFEC6
H'FFFFFEC8
H'FFFFFECA
H'FFFFFECC
H'FFFFFECE
H'FFFFFED0
H'FFFFFED2
H'FFFFFED4
H'FFFFFED6
H'FFFFFED8
H'FFFFFEDA
H'FFFFFEDC
H'FFFFFEDE
Access Size
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
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