HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 133

• Manufacturer Part Number: HD6417708RF100A
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708RF100A

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3.15 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

When the priorities for multiple interrupt sources are set to the same level and such interrupts are
generated at the same time, they are handled according to the default order listed in table 6.4.
Updating of interrupt priority level setting registers A and B should only be performed when the
BL bit in the status register (SR) is set to 1. To prevent erroneous interrupt acknowledgment, first
read one or other of the interrupt priority level setting registers, then clear the BL bit to 0. This
will secure the necessary timing internally.
Table 6.4
Interrupt Source
NMI
IRL
TMU0 TUNI0*
TMU1 TUNI1*
TMU2 TUNI2*
TMU2 TICPI2*
IRL3–IRL0 = 0000 H'200
IRL3–IRL0 = 0001 H'220
IRL3–IRL0 = 0010 H'240
IRL3–IRL0 = 0011 H'260
IRL3–IRL0 = 0100 H'280
IRL3–IRL0 = 0101 H'2A0
IRL3–IRL0 = 0110 H'2C0
IRL3–IRL0 = 0111 H'2E0
IRL3–IRL0 = 1000 H'300
IRL3–IRL0 = 1001 H'320
IRL3–IRL0 = 1010 H'340
IRL3–IRL0 = 1011 H'360
IRL3–IRL0 = 1100 H'380
IRL3–IRL0 = 1101 H'3A0
IRL3–IRL0 = 1110 H'3C0
Interrupt Exception Vectors and Rankings
1
1
1
2
INTEVT
Code
H'1C0
H'400
H'420
H'440
H'460
Interrupt Priority
(Initial Value)
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0–15 (0)
0–15 (0)
0–15 (0)
0–15 (0)
IPR (Bit
Numbers)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IPRA (15–12) —
IPRA (11–8) —
IPRA (7–4)
IPRA (7–4)
Priority within
IPR Setting Unit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
High
Low
Default
Priority
High
Low
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