DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 702

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Section 25 Power-Down Modes
Bit
7
6
5
4
3
2
1
0
Note:
25.2
Figure 25.1 shows the enabled mode transition diagram. The mode transition from program
execution state to program halt state is performed by the SLEEP instruction. The mode transition
from program halt state to program execution state is performed by an interrupt. The STBY input
causes a mode transition from any state to hardware standby mode. The RES input causes a mode
transition from a state other than hardware standby mode to the reset state. Table 25.2 shows the
LSI internal states in each operating mode.
Rev. 3.00 Mar 21, 2006 page 646 of 788
REJ09B0300-0300
MSTPCRL
Bit Name
MSTP7
MSTP6
MSTP5
MSTP4
MSTP3
MSTP2
MSTP1
MSTP0
* This bit can be read from or written to, however, operation is not affected.
Mode Transitions and LSI States
Initial Value
1
1
1
1
1
1
1 *
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Corresponding Module
Serial communication interface_0 (SCI_0)
Serial communication interface_1 (SCI_1)
Serial communication interface_2 (SCI_2)
I
I
Host interface (XBS), keyboard buffer controller,
keyboard matrix interrupt mask register (KMIMR),
keyboard matrix interrupt mask register A (KMIMRA),
port 6 pull-up MOS control register (KMPCR)
Host interface (LPC), wake-up event interrupt mask
register B (WUEMRB)
2
2
C bus interface_0 (IIC_0)
C bus interface_1 (IIC_1)