DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 169

IC H8S MCU FLASH 128K 100-QFP

DF2148BTE20

Manufacturer Part Number
DF2148BTE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BTE20
HD64F2148BTE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148BTE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.6.5
The DTC can be activated by an interrupt. In this case, the following options are available:
For details on interrupt requests that can be used to activate the DTC, see section 7, Data Transfer
Controller (DTC).
Figure 5.8 shows a block diagram of the DTC and interrupt controller.
Selection of Interrupt Source: Interrupt factors are selected as DTC activation source or CPU
interrupt source by the DTCE bit of DTCERA to DTCERE of DTC.
By specifying the DISEL bit of the DTC’s MRB, it is possible to clear the DTCE bit to 0 after
DTC data transfer, and request a CPU interrupt.
If DTC carries out the designate number of data transfers and the transfer counter reads 0, after
DTC data transfer, the DTCE bit is also cleared to 0, and an interrupt is requested to the CPU.
On-chip
supporting
module
Interrupt request to CPU
Activation request to DTC
Selection of a number of the above
IRQ
interrupt
DTC Activation by Interrupt
Interrupt source
clear signal
Interrupt
request
Figure 5.8 DTC and Interrupt Controller
Interrupt controller
Selection
DTVECR
DTCER
circuit
Select
signal
clear signal
Clear signal
SWDTE
Determination of
Control logic
Rev. 3.00 Mar 21, 2006 page 113 of 788
priority
Section 5 Interrupt Controller
DTC activation
request vector
number
CPU interrupt
request vector
number
Clear signal
I, UI
REJ09B0300-0300
CPU
DTC

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