R4F24568NVRFQV Renesas Electronics America, R4F24568NVRFQV Datasheet - Page 1260

• Manufacturer Part Number: R4F24568NVRFQV
• Description: MCU 256KB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVRFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2456, H8S/2456R, H8S/2454 Group
Section 24 Power-Down Modes
24.2.6
All Module Clocks Stop Mode
When the ACSE bit in MSTPCRH is set to 1 and module stop state is set for all the on-chip
peripheral functions controlled by MSTPCR or EXMSTPCR (MSTPCR = H'FFFF, EXMSTPCR
= H'FFFF), or for all the on-chip peripheral functions except the 8-bit timer (MSTPCR = H'FFFE,
EXMSTPCR = H'FFFF), executing a SLEEP instruction while the SSBY bit in SBYCR is cleared
to 0 will cause all the on-chip peripheral functions (except the 8-bit timer and watchdog timer), the
bus controller, and the I/O ports to stop operating, and a transition to be made to all module clocks
stop mode at the end of the bus cycle.
Operation or stopping of the 8-bit timer can be selected by means of the MSTP0 bit.
To further reduce the current consumption in all module clocks stop mode, stop the modules
controlled by RMMSTPCR (RMMSTPCR = H'FFFF).
All module clocks stop mode is cleared by an external interrupt (NMI, IRQ0 to IRQ15* pins),
RES pin input, or an internal interrupt (8-bit timer, watchdog timer), and the CPU returns to the
normal program execution state via the exception handling state. All module clocks stop mode is
not cleared if interrupts are disabled, if interrupts other than NMI are masked by the CPU, or if the
relevant interrupt is designated as a DTC activation source.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Note: * IRQ8 to IRQ15 are not supported by the H8S/2454 Group.
Page 1230 of 1392
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010