R4F24568NVRFQV Renesas Electronics America, R4F24568NVRFQV Datasheet - Page 1030

• Manufacturer Part Number: R4F24568NVRFQV
• Description: MCU 256KB FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24568NVRFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 USB Function Module (USB)
(2)
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is in-
transfer, one packet of data to be sent to the host is written to the FIFO. If there is more data to be
sent, this data is written to the FIFO after the data written first has been sent to the host (EP0i TS
bit in IFR1 = 1).
The end of the data stage is identified when the host transmits an OUT token and the status stage
is entered.
Note: If the size of the data transmitted by the function is smaller than the data size requested by
Page 1000 of 1392
Data Stage (Control-In)
the host, the function indicates the end of the data stage by returning to the host a packet
shorter than the maximum packet size. If the size of the data transmitted by the function is
an integral multiple of the maximum packet size, the function indicates the end of the data
stage by transmitting a zero-length packet.
Data transmission to host
Set EP0i transmission
complete flag.
(IFR1.EP0i TS = 1)
IN token reception
Figure 16.12 Data Stage (Control-In) Operation
to TRG0.EP0s
in EP0i FIFO?
USB function
Valid data
1 written
RDFN?
Yes
Yes
ACK
No
No
NAK
NAK
Interrupt
request
Clear EP0i transmission
complete flag.
(IFR1.EP0i TS = 0)
Write data to EP0i
data register (EPDR0i).
Write 1 to EP0i packet
enable bit.
(TRG0.EP0i PKTE = 1)
Write 1 to EP0i packet
enable bit.
(TRG0.EP0i PKTE = 1)
Write data to EP0i
data register (EPDR0i).
From setup stage
Application
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010