D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 427

• Manufacturer Part Number: D12332VFC20V
• Description: IC H8S/2332 MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

PADR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port A Register (PORTA)
Note: * Determined by state of pins PA
PORTA is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port A pins (PA
If a port A read is performed while PADDR bits are set to 1, the PADR values are read. If a port A
read is performed while PADDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTA contents are determined by the pin states, as
PADDR and PADR are initialized. PORTA retains its prior state in software standby mode.
Port A MOS Pull-Up Control Register (PAPCR)
PAPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port A on an individual bit basis.
All the bits are valid in modes 6 and 7, and bits 7 to 5 are valid in modes 4 and 5. When a PADDR
bit is cleared to 0 (input port setting), setting the corresponding PAPCR bit to 1 turns on the MOS
input pull-up for the corresponding pin.
PAPCR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PA7PCR PA6PCR PA5PCR PA4PCR PA3PCR PA2PCR PA1PCR PA0PCR
R/W
PA7
— *
R
7
7
0
PA6
R/W
— *
R
6
6
0
7
to PA
7
to PA
PA5
R/W
— *
R
5
5
0
0
) must always be performed on PADR.
0
.
R/W
PA4
— *
R
0
4
4
Rev.4.00 Sep. 07, 2007 Page 395 of 1210
R/W
PA3
— *
R
3
3
0
PA2
R/W
— *
R
2
2
0
REJ09B0245-0400
PA1
R/W
— *
R
1
1
0
R/W
PA0
— *
R
0
0
0