D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 1147
![IC H8S/2332 MCU ROMLESS 144QFP](/photos/12/41/124104/d12332vfc20v_sml.jpg)
D12332VFC20V
Manufacturer Part Number
D12332VFC20V
Description
IC H8S/2332 MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12332VFC20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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SCR2—Serial Control Register 2
Bit
Initial value
Read/Write
Transmit Interrupt Enable
0
1
:
:
:
Transmit-data-empty interrupt (TXI) request disabled
Transmit-data-empty interrupt (TXI) request enabled
R/W
TIE
7
0
Receive Interrupt Enable
0
1
R/W
Receive-data-full interrupt (RXI) request and
receive-error interrupt (ERI) request disabled
Receive-data-full interrupt (RXI) request and
receive-error interrupt (ERI) request enabled
RIE
6
0
Transmit Enable
0
1
R/W
TE
Transmission disabled
Transmission enabled
5
0
Receive Enable
0
1
R/W
RE
Reception disabled
Reception enabled
4
0
Multiprocessor Interrupt Enable
0
1
MPIE
R/W
Multiprocessor interrupts disabled
[Clearing conditions]
• When the MPIE bit is cleared to 0
• When data with MPB = 1 is received
Multiprocessor interrupts enabled
Receive-data-full interrupt (RXI) requests, receive error interrupt (ERI)
requests, and setting of the RDRF, FER, and ORER flags in SSR are
disabled until data with the multiprocessor bit set to 1 is received
3
0
Transmit End Interrupt Enable
0
1
TEIE
R/W
Transmit-end interrupt (TEI) request disabled
Transmit-end interrupt (TEI) request enabled
2
0
Notes:
Clock Enable
Rev.4.00 Sep. 07, 2007 Page 1115 of 1210
0
1
H'FF8A
CKE1
R/W
0
1
0
1
1. Outputs a clock of the same frequency as the bit rate.
2. Inputs a clock with a frequency 16 times the bit rate.
1
0
Asynchronous
mode
Synchronous
mode
Asynchronous
mode
Synchronous
mode
Asynchronous
mode
Synchronous
mode
Asynchronous
mode
Synchronous
mode
CKE0
R/W
0
0
Internal clock/SCK pin functions
as I/O port
Internal clock/SCK pin functions
as serial clock output
Internal clock/SCK pin functions
as clock output*
Internal clock/SCK pin functions
as serial clock output
External clock/SCK pin functions
as clock input*
External clock/SCK pin functions
as serial clock input
External clock/SCK pin functions
as clock input*
External clock/SCK pin functions
as serial clock input
REJ09B0245-0400
2
2
1
SCI2
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