MC908GT16CBE Freescale Semiconductor, MC908GT16CBE Datasheet - Page 81
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MC908GT16CBE
Manufacturer Part Number
MC908GT16CBE
Description
IC MCU 16K FLASH 8MHZ SPI 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GT8CFBE.pdf
(292 pages)
Specifications of MC908GT16CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
34
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GT
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
30
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Package
42SPDIP
Family Name
HC08
Maximum Speed
8 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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7.3.2.1 Digitally Controlled Oscillator
The digitally controlled oscillator (DCO) is an inaccurate oscillator which generates the internal clock
(ICLK). The clock period of ICLK is dependent on the digital loop filter outputs (DSTG[7:0] and DDIV[3:0]).
Because of only a limited number of bits in DDIV and DSTG, the precision of the output (ICLK) is restricted
to a precision of approximately ±0.202 percent to ±0.368 percent when measured over several cycles (of
the desired frequency). Additionally, since the propagation delays of the devices used in the DCO ring
oscillator are a measurable fraction of the bus clock period, reaching the long-term precision may require
alternately running faster and slower than desired, making the worst case cycle-to-cycle frequency
variation ±6.45 percent to ±11.8 percent (of the desired frequency). The valid values of DDIV:DSTG range
from $000 to $9FF. For more information on the quantization error in the DCO, see
Error in DCO
7.3.2.2 Modulo N Divider
The modulo N divider creates the low-frequency base clock (IBASE) by dividing the internal clock (ICLK)
by the ICG multiplier factor (N), contained in the ICG multiplier register (ICGMR). When N is programmed
to a $01 or $00, the divider is disabled and ICLK is passed through to IBASE undivided. When the internal
clock generator is stable, the frequency of IBASE will be equal to the nominal frequency (f
kHz ± 25 percent.
Freescale Semiconductor
VOLTAGE AND
ICGEN
REFERENCES
CURRENT
Output.
NAME
NAME
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Figure 7-3. Internal Clock Generator Block Diagram
CONFIG2 REGISTER BIT
TOP LEVEL SIGNAL
–
– –
++
+
CLOCK GENERATOR
COMPARATOR
FREQUENCY
DIGITAL
FILTER
TRIM[7:0]
LOOP
CONTROLLED
OSCILLATOR
DIGITALLY
MODULO
DIVIDER
N[6:0]
N
NAME
NAME
MODULE SIGNAL
REGISTER BIT
Functional Description
7.4.4 Quantization
DSTG[7:0]
DDIV[3:0]
FICGS
IBASE
NOM
ICLK
) of 307.2
81
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