MC908GT16CBE Freescale Semiconductor, MC908GT16CBE Datasheet - Page 140

• Manufacturer Part Number: MC908GT16CBE
• Description: IC MCU 16K FLASH 8MHZ SPI 42SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GT16CBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 36
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Controller Family/series: HC08
• No. Of I/o's: 34
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GT
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 30
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Package: 42SPDIP
• Family Name: HC08
• Maximum Speed: 8 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Resets and Interrupts
POR — Power-On Reset Flag
PIN — External Reset Flag
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit
MODRST — Monitor Mode Entry Module Reset Bit
LVI — Low-Voltage Inhibit Reset Bit
13.3 Interrupts
An interrupt temporarily changes the sequence of program execution to respond to a particular event. An
interrupt does not stop the operation of the instruction being executed, but begins when the current
instruction completes its operation.
13.3.1 Effects
An interrupt:
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1 = Power-on reset since last read of SRSR
0 = Read of SRSR since last power-on reset
1 = External reset via RST pin since last read of SRSR
0 = POR or read of SRSR since last external reset
1 = Last reset caused by timeout of COP counter
0 = POR or read of SRSR since any reset
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR since any reset
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR since any reset
1 = Last reset caused by forced monitor mode entry.
0 = POR or read of SRSR since any reset
1 = Last reset caused by low-power supply voltage
0 = POR or read of SRSR since any reset
Saves the CPU registers on the stack. At the end of the interrupt, the RTI instruction recovers the
CPU registers from the stack so that normal processing can resume.
Sets the interrupt mask (I bit) to prevent additional interrupts. Once an interrupt is latched, no other
interrupt can take precedence, regardless of its priority.
Loads the program counter with a user-defined vector address
Address:
Read:
Write:
POR:
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
$FE01
POR
Bit 7
1
Figure 13-3. SIM Reset Status Register (SRSR)
= Unimplemented
PIN
6
0
COP
5
0
ILOP
4
0
ILAD
3
0
MODRST
2
0
LVI
1
0
Freescale Semiconductor
Bit 0
0
0