R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 95
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 58 of 802
5.5
5.6
The cold start-up/warm start-up determination function uses the CWR bit in the RSTFR register to determine cold
start-up (reset process) at power-on and warm start-up (reset process) when a reset occurred during operation.
The CWR bit is set to 0 (cold start-up) at power-on and also set to 0 at an exit from power-off mode. When 1 is
written to the CWR bit by a program, it is set to 1. This bit remains unchanged at a hardware reset, software reset,
or watchdog timer reset.
The RSTFR register can be used to detect whether a hardware reset, software reset, or watchdog timer reset has
occurred.
If a hardware reset or an exit from power-off mode occurs, the HWR bit is set to 1 (detected).
If a software reset occurs, the SWR bit is set to 1 (detected).
If a watchdog timer reset occurs, the WDR bit is set to 1 (detected).
Cold Start-Up/Warm Start-Up Determination Function
Reset Source Determination Function
Oct 30, 2009
5. Resets
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