R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 612
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 575 of 802
Figure 26.12
RDRF bit in
SSSR register
RSSTP bit in
SSCRH register
RDRF bit in
SSSR register
RSSTP bit in
SSCRH register
Program
processing
Program
processing
• CPHS bit = 0 (data download at even edges), CPOS bit = 0 (“H” when clock stops), and
• CPHS bit = 1 (data download at odd edges), CPOS bit = 0 (“H” when clock stops), and BS3 to
BS3 to BS0 = 1000b (8 bits)
BS0 = 1000b (8 bits)
(output)
(output)
SSCK
SSCK
SCS
SCS
SSI
SSI
Example of Synchronous Serial Communication Unit Operation during Data
Reception (4-Wire Bus Communication Mode, 8-Bit SSU Data Transfer Length)
1
0
1
0
1
0
1
0
BS0 to BS3: Bits in SSBR register
CPHS, CPOS: Bits in SSMR register
Dummy read
the SSRDR register.
Dummy read
the SSRDR register.
b7
Oct 30, 2009
b7
1 frame
RXI interrupt request
generation
RXI interrupt request
generation
1 frame
b0
Read data from
the SSRDR register.
Read data from
the SSRDR register.
b0
b7
b7
26. Synchronous Serial Communication Unit (SSU)
1 frame
RXI interrupt request
generation
RXI interrupt request
generation
1 frame
b0
Set the RSSTP bit to 1.
Set the RSSTP bit to 1.
b0
b7
b7
Read data from
the SSRDR register.
Read data from
the SSRDR register.
RXI interrupt request
generation
RXI interrupt request
generation
High-impedance
b0
High-impedance
b0
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