R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 180
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 143 of 802
Figure 9.8
9.7.9
Notes:
FMR01, FMSTP: Bits in FMR0 register
2. Before switching the CPU clock source, make sure the designated
3. Insert a wait time of 60 s by a program.
1. After setting the FMR01 bit to 1 (CPU rewrite mode enabled),
Transfer the FMSTP bit setting program to RAM
Jump to the FMSTP bit setting program
(The subsequent processing is executed by
the program in the RAM)
In low-speed on-chip oscillator mode and low-speed clock mode, power consumption can be further reduced by
stopping the flash memory using the FMSTP bit in the FMR0 register.
Access to the flash memory is disabled by setting the FMSTP bit to 1 (flash memory stops). The FMSTP bit
must be written to by a program transferred to RAM.
When the MUC enters stop mode or wait mode while CPU rewrite mode is disabled, the power for the flash
memory is automatically turned off. It is turned back on again after the MCU exit stop mode or wait mode. This
eliminates the need to set the FMR0 register.
Figure 9.8 shows the Handling Procedure Example for Reducing Power Consumption Using FMSTP Bit.
clock is stable.
Do not access the flash memory during this wait time.
set the FMSTP bit to 1 (flash memory stops).
Stopping Flash Memory
Handling Procedure Example for Reducing Power Consumption Using FMSTP Bit
Oct 30, 2009
FMSTP bit setting program
Jump to the specified address in the flash memory
Write 1 to the FMSTP bit (flash memory stops.
low power consumption state)
After writing 0 to the FMR01 bit,
write 1 (CPU rewrite mode enabled)
Enter low-speed clock mode or
low-speed on-chip oscillator mode
Write 0 to the FMSTP bit
(flash memory operates)
Write 0 to the FMR01 bit
(CPU rewrite mode disabled)
Wait until the flash memory circuit stabilizes
(60 s)
Switch the clock source for the CPU clock
Process in low-speed clock mode or
low-speed on-chip oscillator mode
(3)
Stop the XIN clock
(1)
9. Power Control
(2)
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