R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 685

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Price
Company:
Part Number:
R5F21346CNFP#U0
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R5F21346CNFP#U0
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 652 of 723
31.7
31.7.1
Table 31.9
FMR21, FMR22: Bits in FMR2 register
EW0
EW1
Mode
31.7.1.1
31.7.1.2
The following instructions cannot be used while the program ROM area is being rewritten in EW0 mode
because they reference data in the flash memory: UND, INTO, and BRK.
Tables 31.9 to 31.11 show CPU Rewrite Mode Interrupts (1), (2) and (3), respectively.
Notes on Flash Memory
Data
flash
Program
ROM
Data
flash
Program
ROM
Erase/
Target
Write
CPU Rewrite Mode
Prohibited Instructions
CPU Rewrite Mode Interrupts (1)
Interrupts
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled)
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled
During
auto-programming
or FMR22 = 0)
or FMR22 = 0)
or FMR22 = 0)
Status
When an interrupt request is acknowledged, interrupt handling is executed.
If the FMR22 bit is set to 1 (erase-suspend request enabled by interrupt request),
the FMR21 bit is automatically set to 1 (erase-suspend request). The flash memory
suspends auto-erasure after td(SR-SUS).
If erase-suspend is required while the FMR22 bit is set to 0 (erase-suspend request
disabled by interrupt request), set the FMR21 bit to 1 during interrupt handling. The flash
memory suspends auto-erasure after td(SR-SUS).
While auto-erasure is being suspended, any block other than the block during auto-
erasure execution can be read or written. Auto-erasure can be restarted by setting the
FMR21 bit to 0 (erase restart).
Interrupt handling is executed while auto-erasure or auto-programming is being
performed.
Usable by allocating a vector in RAM.
When an interrupt request is acknowledged, interrupt handling is executed.
If the FMR22 bit is set to 1, the FMR21 bit is automatically set to 1. The flash memory
suspends auto-erasure after td(SR-SUS).
If erase-suspend is required while the FMR22 bit is set to 0, set the FMR21 bit to 1 during
interrupt handling. The flash memory suspends auto-erasure after td(SR-SUS).
While auto-erasure is being suspended, any block other than the block during auto-
erasure execution can be read or written. Auto-erasure can be restarted by setting the
FMR21 bit to 0.
Interrupt handling is executed while auto-erasure or auto-programming is being
performed.
Auto-erasure suspends after td(SR-SUS) and interrupt handling is executed. Auto-
erasure can be restarted by setting the FMR21 bit to 0 after interrupt handling completes.
While auto-erasure is being suspended, any block other than the block during auto-
erasure execution can be read or written.
Auto-erasure and auto-programming have priority and interrupt requests are put on
standby. Interrupt handling is executed after auto-erase and auto-program complete.
Maskable Interrupt
31. Flash Memory

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