R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 485

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 452 of 723
Figure 22.7
• Receive Timing Example When Transfer Data is 8 Bits Long (Parity Disabled, One Stop Bit)
UiBRG output
Transfer clock
SiRIC register
UiC1 register
UiC1 register
RE bit in
RI bit in
IR bit in
RXDi
The above applies when :
Receive Timing in UART Mode
• PRYE bit in UiMR register = 0 (parity disabled)
• STPS bit in UiMR register = 0 (one stop bit)
i = 0 or 1
Reception starts when a transfer clock is
generated at the falling edge of the start bit.
Start bit
“L” is determined.
D0
Set to 0 when an interrupt request is acknowledged or by a program.
Receive data taken in
D1
Data transfer from UARTi receive register to UiRB register
22. Serial Interface (UARTi (i = 0 or 1))
D7
Stop bit

Related parts for R5F21346CNFP#U0