R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 530
![MCU 1KB FLASH 32K ROM 48-LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21346CNFP#U0
Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet
1.R5F21346CNFPU0.pdf
(759 pages)
Specifications of R5F21346CNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 497 of 723
Figure 23.21
Serial data
MP bit in
U2SMR5 register
MPIE bit in
U2SMR5 register
RI bit in
U2C1 register
U2RB register
MCU operation
User processing
Serial data
MP bit in
U2SMR5 register
MPIE bit in
U2SMR5 register
RI bit in
U2C1 register
U2RB register
MCU operation
User processing
1
1
Data/Multiprocessor Bit/One-Stop Bit)
Receive Operation Example during Multiprocessor Communication (with 8-Bit
Detect the MPRB bit and
set the MPIE bit to 0.
1
Detect the MPRB bit and
set the MPIE bit to 0.
1
Start
bit
0
Start
bit
0
D0
D0
ID1
D1
D1
data (ID2)
A reception
complete
interrupt request
is generated.
Receive
1 frame
data (ID1)
A reception complete
interrupt request is
generated.
Receive
1 frame
(a) When Data Does Not Match Own Station ID
D7
(b) When Data Matches Own Station ID
D7
MPRB
Set the RI bit to 0.
Read data in the
U2RB register.
1
MPRB
1
Stop
bit
1
Set the RI bit to 0.
Stop
Read data in the
U2RB register.
bit
1
0
0
If data matches own
station ID, continue
reception without any
setting changes.
ID2
D0
ID1
D0
D1
If data does not match
own station ID, set the
MPIE bit to 1 again.
D1
data (DATA2)
Receive
1 frame
data (DATA1)
Receive
1 frame
A reception
complete
interrupt request
is generated.
D7
D7
MPRB: Bit in U2RB register
MPIE: Bit in U2SMR5 register
MPRB
0
23. Serial Interface (UART2)
MPRB
No reception complete
interrupt request is
generated.
The U2RB register retains
state.
0
Set the RI bit to 0.
Read data in the
U2RB register.
1
1
Marked state
1
(Idle state)
Marked state
1
(Idle state)
DATA2
Set the MPIE bit
to 1 again.
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