R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 572
R5F21346CNFP#U0
Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet
1.R5F21346CNFPU0.pdf
(759 pages)
Specifications of R5F21346CNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 539 of 723
26.2.7
Notes:
After Reset
1. When rewriting the SDAO bit, write 0 to the SDAOP bit simultaneously using the MOV instruction.
2. Do not write to the SDAO bit during a transfer operation.
3. Enabled in master mode. When writing to the BBSY bit, write 0 to the SCP bit simultaneously using the MOV
4. Disabled when the clock synchronous serial format is used.
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0199h
instruction. Execute the same way when a start condition is regenerated.
Symbol
SDAOP SDAO write protect bit
Symbol
IICRST I
SDAO
Bit
SCLO
BBSY
SCP
IIC bus Control Register 2 (ICCR2)
—
—
BBSY
b7
0
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
SCL monitor flag
SDA output value control bit
Start/stop condition generation
disable bit
Bus busy bit
2
C bus control block reset bit
SCP
b6
1
Bit Name
(4)
SDAO
b5
1
SDAOP
b4
1
When hang-up occurs due to communication failure during
I
block of the I
initializing registers.
0: SCL pin is set to “L”
1: SCL pin is set to “H”
When rewriting the SDAO bit, write 0 simultaneously
When read, the content is 1.
When read
0: SDA pin output is held “L”
1: SDA pin output is held “H”
When written
0: SDA pin output is changed to “L”
1: SDA pin output is changed to high-impedance
When writing to the to BBSY bit, write 0 simultaneously
When read, the content is 1.
Writing 1 is invalid.
When read:
0: Bus is released
1: Bus is occupied
When written
0: Stop condition generated
1: Start condition generated
2
C bus interface operation, writing 1 resets the control
(“H” output via external pull-up resistor)
(SDA signal changes from “L” to “H”
(SDA signal changes from “H” to “L”
while SCL signal is held “H”)
while SCL signal is held “H”)
SCLO
b3
1
2
C bus interface without setting ports or
(1, 2)
(3)
:
b2
—
1
Function
IICRST
b1
0
b0
—
1
26. I
2
C bus Interface
(1)
.
(3)
.
R/W
R/W
R/W
R/W
R/W
R/W
—
—
R
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