S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 692

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Motor Controller (MC10B8CV1)
19.3.2.2
This register controls the behavior of the analog section of the motor controller as well as the interrupt
enables.
692
.
Offset Module Base + 0x0001
Reset
RECIRC
MCTOIE
Field
7
0
W
R
RECIRC
0 Recirculation on the high side transistors. Active state for PWM output is logic low, the static channel will
1 Recirculation on the low side transistors. Active state for PWM output is logic high, the static channel will
0 Interrupt disabled.
1 Interrupt enabled. An interrupt will be generated when the motor controller timer counter overflow interrupt flag
Recirculation in (Dual) Full H-Bridge Mode (refer to
Motor Controller Timer Counter Overflow Interrupt Enable
Motor Controller Control Register 1
7
0
output logic high.
output logic low.
(MCTOIF) is set.
affects the outputs in (dual) full H-bridge modes. In half H-bridge mode, the PWM output is always active low.
RECIRC = 1 will also invert the effect of the S bits (refer to
H-bridge modes. RECIRC must be changed only while no PWM channel is operating in (dual) full H-bridge
mode; otherwise, erroneous output pattern may occur.
= Unimplemented or Reserved
Figure 19-4. Motor Controller Control Register 1 (MCCTL1)
6
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 19-5. MCCTL1 Field Descriptions
MCPRE[1:0]
5
0
0
Table 19-4. Prescaler Values
00
01
10
11
4
0
0
Description
Section 19.4.1.3.3, “RECIRC
f
f
f
Bus
Bus
Bus
f
f
Bus
TC
3
0
0
/2
/4
/8
Section 19.4.1.3.2, “Sign Bit
2
0
0
Bit”)— RECIRC only
Freescale Semiconductor
1
0
0
(S)”) in (dual) full
MCTOIE
0
0