MC9S08SH16MTG Freescale Semiconductor, MC9S08SH16MTG Datasheet - Page 70

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MC9S08SH16MTG

Manufacturer Part Number
MC9S08SH16MTG
Description
MCU 8BIT 16K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08SH16MTG

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP
Core
S08
Processor Series
MC9S08Sxx
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
1 KB
On-chip Adc
Yes
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
8
Height
1.05 mm
Interface Type
SCI, SPI, I2C
Length
5 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
4.4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
1
Chapter 5 Resets, Interrupts, and General System Control
5.7.5
This high page register contains bits to configure MCU specific features on the MC9S08SH32 Series
devices.
70
This bit can be written only one time after reset. Additional writes are ignored.
COPCLKS
T2CH1PS
T2CH0PS
T1CH1PS
T1CH0PS
Reset:
COPW
Field
ACIC
7
6
4
3
2
1
0
W
R
COPCLKS
System Options Register 2 (SOPT2)
COP Watchdog Clock Select — This write-once bit selects the clock source of the COP watchdog.
0 Internal 1-kHz clock is source to COP.
1 Bus clock is source to COP.
COP Window — This write-once bit selects the COP operation mode. When set, the 0x55-0xAA write sequence
to the SRS register must occur in the last 25% of the selected period. Any write to the SRS register during the
first 75% of the selected period will reset the MCU.
0 Normal COP operation
1 Window COP operation (only if COPCLKS = 1)
Analog Comparator to Input Capture Enable— This bit connects the output of ACMP to TPM1 input channel 0.
0 ACMP output not connected to TPM1 input channel 0.
1 ACMP output connected to TPM1 input channel 0.
TPM2CH1 Pin Select— This selects the location of the TPM2CH1 pin of the TPM2 module.
0 TPM2CH1 on PTB4.
1 TPM2CH1 on PTA7.
TPM2CH0 Pin Select— This bit selects the location of the TPM2CH0 pin of the TPM2 module.
0 TPM2CH0 on PTA1.
1 TPM2CH0 on PTA6.
TPM1CH1 Pin Select— This selects the location of the TPM1CH1 pin of the TPM1 module.
0 TPM1CH1 on PTB5.
1 TPM1CH1 on PTC1.
TPM1CH0 Pin Select— This bit selects the location of the TPM1CH0 pin of the TPM1 module.
0 TPM1CH0 on PTA0.
1 TPM1CH0 on PTC0.
0
7
1
= Unimplemented or Reserved
COPW
0
6
1
Figure 5-6. System Options Register 2 (SOPT2)
Table 5-7. SOPT2 Register Field Descriptions
MC9S08SH32 Series Data Sheet, Rev. 2
0
0
5
PRELIMINARY
ACIC
0
4
Description
T2CH1PS
3
0
T2CH0PS
0
2
T1CH1PS
Freescale Semiconductor
0
1
T1CH0PS
0
0

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