MC9S08SH16MTG Freescale Semiconductor, MC9S08SH16MTG Datasheet - Page 282

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MC9S08SH16MTG

Manufacturer Part Number
MC9S08SH16MTG
Description
MCU 8BIT 16K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08SH16MTG

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP
Core
S08
Processor Series
MC9S08Sxx
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
1 KB
On-chip Adc
Yes
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
8
Height
1.05 mm
Interface Type
SCI, SPI, I2C
Length
5 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
4.4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Chapter 17 Development Support
1
17.4.3
The debug module includes nine bytes of register space for three 16-bit registers and three 8-bit control
and status registers. These registers are located in the high register space of the normal memory map so
they are accessible to normal application programs. These registers are rarely if ever accessed by normal
user application programs with the possible exception of a ROM patching mechanism that uses the
breakpoint logic.
17.4.3.1
This register contains compare value bits for the high-order eight bits of comparator A. This register is
forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.
17.4.3.2
This register contains compare value bits for the low-order eight bits of comparator A. This register is
forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.
17.4.3.3
This register contains compare value bits for the high-order eight bits of comparator B. This register is
forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.
17.4.3.4
This register contains compare value bits for the low-order eight bits of comparator B. This register is
forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.
282
Reset
BDFR is writable only through serial background mode debug commands, not from user programs.
BDFR
Field
W
0
R
DBG Registers and Control Bits
Background Debug Force Reset — A serial active background mode command such as WRITE_BYTE allows
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
0
0
7
Debug Comparator A High Register (DBGCAH)
Debug Comparator A Low Register (DBGCAL)
Debug Comparator B High Register (DBGCBH)
Debug Comparator B Low Register (DBGCBL)
Figure 17-6. System Background Debug Force Reset Register (SBDFR)
= Unimplemented or Reserved
0
0
6
Table 17-3. SBDFR Register Field Description
MC9S08SH32 Series Data Sheet, Rev. 2
0
0
5
PRELIMINARY
0
0
4
Description
0
0
3
0
0
2
Freescale Semiconductor
1
0
0
BDFR
0
0
0
1

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