ST72F324J6T6 STMicroelectronics, ST72F324J6T6 Datasheet - Page 42

• Manufacturer Part Number: ST72F324J6T6
• Description: IC MCU 8BIT 32K 44-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324J6T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• No. Of Pwm Channels: 1
• Rohs Compliant: Yes
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1024 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7F521-IND/USB, ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Cpu Family: ST7
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3.8V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• For Use With: 497-8222 - UPS (LINE INTERACTIVE - 450W)497-8436 - BOARD EVAL UPS 450W VOUT=220V497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-2108

Interrupts
7.2.1
42/193
Table 14.
Figure 18. Interrupt processing flowchart
Servicing pending interrupts
As several interrupts can be pending at the same time, the interrupt to be taken into account
is determined by the following two-step process:
●
●
Figure 19
Figure 19. Priority decision process flowchart
Level 0 (main)
Level 1
Level 2
Level 3 (= interrupt disable)
the highest software priority interrupt is serviced,
if several interrupts have the same software priority then the interrupt with the highest
hardware priority is serviced first.
describes this decision process.
Interrupt software priority
RESTORE PC, X, A, CC
Interrupt software priority levels
Reset
from stack
HIGHEST HARDWARE
PRIORITY SERVICED
Same
Y
Pending
I
instruction
Fetch next
nterrupt
I
nstruction
Execute
N
“IRET”
N
INTERRUPTS
SOFTWARE
PRIORITY
PENDING
HIGHEST SOFTWARE
PRIORITY SERVICED
Y
stays pending
The interrupt
Interrupt has the same or a
Level
Different
High
Low
lower software priority
load I1:0 from interrupt SW reg.
than current one
load PC from interrupt vector
Stack PC, X, A, CC
I1
1
0
0
1
TRAP
I1:0
N
ST72324Bxx
Y
I0
0
1
0
1