ST72F324J6T6 STMicroelectronics, ST72F324J6T6 Datasheet - Page 123
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ST72F324J6T6
Manufacturer Part Number
ST72F324J6T6
Description
IC MCU 8BIT 32K 44-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST72F324J6T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
ST7
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
No. Of Pwm Channels
1
Rohs Compliant
Yes
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1024 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
3.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7F521-IND/USB, ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Cpu Family
ST7
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3.8V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
For Use With
497-8222 - UPS (LINE INTERACTIVE - 450W)497-8436 - BOARD EVAL UPS 450W VOUT=220V497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2108
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F324J6T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST72F324J6T6
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
ST72F324J6T6/TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
ST72324Bxx
Table 63.
SCI control register 2 (SCICR2)
Table 64.
SCICR2
Bit
Bit
7
6
5
4
1
0
R/W
TIE
7
Name
Name
TCIE
ILIE
PIE
RIE
TIE
PS
SCICR1 register description (continued)
SCICR2 register description
Parity selection
Parity interrupt enable
Transmitter interrupt enable
Transmission complete interrupt enable
Receiver interrupt enable
Idle line interrupt enable
TCIE
R/W
This bit selects the odd or even parity when the parity generation/detection is
enabled (PCE bit set). It is set and cleared by software. The parity will be selected
after the current byte.
0: Even parity
1: Odd parity
This bit enables the interrupt capability of the hardware parity control when a parity
error is detected (PE bit set). It is set and cleared by software.
0: Parity error interrupt disabled
1: Parity error interrupt enabled
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever TDRE = 1 in the SCISR register.
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever TC = 1 in the SCISR register.
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever OR = 1 or RDRF = 1 in the SCISR
register.
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever IDLE = 1 in the SCISR register.
6
R/W
RIE
5
R/W
ILIE
4
Function
Function
R/W
TE
3
R/W
RE
2
Reset value: 0000 0000 (00h)
On-chip peripherals
RWU
R/W
1
SBK
R/W
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