ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 98

• Manufacturer Part Number: ST7FLITE49K2T6TR
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

On-chip peripherals
11.2.4
11.2.5
Note:
11.2.6
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Low power modes
Table 35.
Interrupts
Table 36.
The AT4 IC is connected to an interrupt vector. The OVF event is mapped on a separate
vector (see Interrupts chapter).
They generate an interrupt if the enable bit is set in the ATCSR register and the interrupt
mask in the CC register is reset (RIM instruction).
Register description
Timer control status register (ATCSR)
Reset value: 0x00 0000 (x0h)
Bit 7 = Reserved
Bit 6 = ICF Input capture flag
Bit 5 = ICIE IC interrupt enable bit
Overflow Event2
Interrupt event
Overflow Event
This Bit is set by hardware and cleared by software by reading the ATICR register (a
read access to ATICRH or ATICRL clears this flag). Writing to this bit does not change
the bit value.
0: No input capture
1: An input capture has occurred
This bit is set and cleared by software.
0: Input Capture Interrupt Disabled
1: Input Capture Interrupt Enabled
7
0
AT4 IC Event
Mode
Wait
Halt
Effect of low power modes on autoreload timer
Description of interrupt events
ICF
ICIE
Event
OVF1
OVF2
flag
ICF
CK1
control bit
Read / Write
Enable
OVIE1
OVIE2
ICIE
No effect on AT timer
CK0
AT timer halted.
Description
Exit from
Wait
Yes
Yes
Yes
OVF1
Exit from
Halt
No
No
No
OVFIE1
ST7LITE49K2
Active-halt
Exit from
CMPIE
Yes
No
No
0