ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 146

• Manufacturer Part Number: ST7FLITE49K2T6TR
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

On-chip peripherals
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Figure 71. Transfer sequencing
1. S=Start, S
2. EV1: EVF=1, ADSL=1, cleared by reading SR1 register.
3. EV2: EVF=1, BTF=1, cleared by reading SR1 register followed by reading DR register.
4. EV3: EVF=1, BTF=1, cleared by reading SR1 register followed by writing DR register.
5. EV3-1: EVF=1, AF=1, BTF=1; AF is cleared by reading SR1 register. BTF is cleared by releasing the lines
7-bit slave receiver
7-bit slave transmitter
7-bit master receiver
7-bit master transmitter
10-bit slave receiver
10-bit slave transmitter
10-bit master transmitter
10-bit master receiver
S Address A
S Address A
S
S
S
if ITE=1).
(STOP=1, STOP=0) or by writing DR register (DR=FFh). If lines are released by STOP=1, STOP=0, the
S
EV5
EV5
EV5
Header
Header A
r
Address A
Address A
= Repeated Start, P=Stop, A=Acknowledge, NA=Non-acknowledge, EVx=Event (with interrupt
A
EV1 EV3
EV1
Address
S
r
EV9
S
EV6
EV6 EV8
Header A
r
Data1
EV5
Address A
Data1 A
A
Data1
Header A
A
EV1
Data1
EV1 EV3
EV2
A
EV3
Data1
EV6 EV8
EV7
Data2
A
EV6
Data2 A
EV8
Data1 A
Data2
A
A
Data1
Data1
Data2
EV2
EV2
EV3
A
EV3
A
.....
A
.....
EV7
A
....
EV7
.
EV8
...
EV8
DataN A
DataN
Data
....
.
Data
N
.....
N
....
....
DataN
.
DataN A
NA
DataN A
A
Data
A
N
EV2
EV3-
EV3-
ST7LITE49K2
EV2
NA
1
1
A
P
EV7
P
P
EV7
P
EV8
EV8
EV4
EV4
EV4
EV4
P
P
P
P