ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 189

IC MCU 8BIT 8K FLASH 32LQFP

ST7FLITE49K2T6TR

Manufacturer Part Number
ST7FLITE49K2T6TR
Description
IC MCU 8BIT 8K FLASH 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITE49K2T6TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FLITE4x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
For Use With
497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE49K2T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST7FLITE49K2T6TR
Manufacturer:
ST
0
ST7LITE49K2
12.2.1
Table 68.
Mnemo
CALLR
JRNM
BRES
BSET
JRNH
CALL
BTJF
BTJT
HALT
IRET
JRMI
JRIH
ADC
ADD
AND
BCP
DEC
JRIL
JRM
CLR
CPL
JRH
JRA
JRT
JRF
INC
CP
JP
Jump if ext. interrupt = 1
Jump if ext. interrupt = 0
Bit compare A, Memory
Call subroutine relative
Interrupt routine return
Jump if N = 1 (minus)
Jump if bit is false (0)
Jump relative always
Jump if bit is true (1)
Arithmetic Compare
Illegal opcode reset
In order to provide enhanced robustness to the device against unexpected behavior, a
system of illegal opcode detection is implemented: a reset is generated if the code to be
executed does not correspond to any opcode or prebyte value. This, combined with the
Watchdog, allows the detection and recovery from an unexpected fault or interference.
A valid prebyte associated with a valid opcode forming an unauthorized combination does
not generate a reset.
Illegal opcode detection
One Complement
I
Call subroutine
Add with Carry
Absolute Jump
Jump relative
Jump if H = 1
Jump if H = 0
Description
Jump if I = 1
Jump if I = 0
Logical And
Never jump
Decrement
Increment
Bit Reset
Addition
Bit Set
Clear
Halt
Function/Example
btjf Byte, #3, Jmp1
btjt Byte, #3, Jmp1
Pop CC, A, X, PC
A = A + M + C
bres Byte, #3
bset Byte, #3
tst(Reg - M)
A = FFH-A
A = A + M
jp [TBL.w]
tst (A . M)
A = A . M
H = 1 ?
H = 0 ?
N = 1 ?
I = 1 ?
I = 0 ?
dec Y
inc X
jrf *
reg, M
reg, M
reg, M
reg, M
Dst
reg
M
M
M
M
A
A
A
A
Src
M
M
M
M
M
H
H
H
H
0
I
I
Instruction set
N
N
N
N
N
N
N
N
N
N
0
Z
Z
Z
Z
Z
1
Z
Z
Z
Z
Z
189/245
C
C
C
C
C
C
C
1

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