ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 21

• Manufacturer Part Number: ST7FLITE49K2T6TR
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7LITE49K2
3
Caution:
Table 3.
Address
0009h to
000Bh
000Ch
000Dh
000Eh
000Fh
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0010h
Register and memory mapping
As shown in
registers.
The available memory locations consist of 128 bytes of register locations, 384 bytes of
RAM, 256 bytes of data EEPROM and 8 Kbytes of Flash program memory. The RAM space
includes up to 128 bytes for the stack from 180h to 1FFh.
The highest address bytes contain the user reset and interrupt vectors.
The Flash memory contains two sectors (see ) mapped in the upper part of the ST7
addressing space so the reset and interrupt vectors are located in Sector 0 (FFE0h-FFFFh).
The size of Flash Sector 0 and other device options are configurable by option bytes (refer
to
Memory locations marked as “Reserved” must never be accessed. Accessing a reserved
area can have unpredictable effects on the device.
Hardware register map
TIMER
Port A
Port B
Port C
Block
LITE
Section 14.1 on page
Register label
Figure
LTCNTR
LTCSR2
LTCSR1
PBDDR
PCDDR
PADDR
LTARR
PBDR
PBOR
PCDR
PCOR
LTICR
PADR
PAOR
4, the MCU is capable of addressing 64 Kbytes of memories and I/O
(1)
230).
Lite Timer Control/Status register 2
Lite Timer Control/Status register 1
Lite Timer Input Capture register
Lite Timer Auto-reload register
Port C Data Direction register
Port A Data Direction register
Port B Data Direction register
Lite Timer Counter register
Reserved area (3 bytes)
Port C Option register
Port A Option register
Port B Option register
Port C Data register
Port A Data register
Port B Data register
Register name
Register and memory mapping
Reset status
0x00 0000b
0Fh
00h
00h
00h
00h
00h
00h
00h
00h
08h
00h
00h
xxh
Read Only
Read Only
Remarks
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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