ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 207

• Manufacturer Part Number: ST7FLITE49K2T6TR
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7LITE49K2
13.6
Figure 97. SPI master timing diagram
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Clock and timing characteristics
Subject to general operating conditions for V
Table 83.
1. Guaranteed by Design. Not tested in production.
2. Data based on typical application software.
3. Time measured between interrupt event and interrupt vector fetch. Δt
Symbol
t
c(INST)
t
mode) has its alternate function capability released. In this case, the pin status depends of the I/O port
configuration.
v(IT)
needed to finish the current instruction execution.
MISO
MOSI
SS
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
Interrupt reaction time
General timings
Instruction cycle time
t
v(IT)
See note 2
Parameter
= Δt
c(INST)
t
su(MI)
(1)
+ 10
MSB OUT
(3)
t
MSB IN
h(MI)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
f
f
CPU
CPU
Conditions
DD
DD
BIT6 OUT
, f
= 8 MHz
= 8 MHz
BIT6 IN
and 0.7xV
OSC
, and T
DD
t
h(MO)
c(INST)
.
A
.
1.25
Min
250
10
2
is the number of t
t
t
Electrical characteristics
r(SCK)
f(SCK)
LSB OUT
Typ
LSB IN
375
3
(2)
1500
Max
2.75
CPU
12
22
See note 2
cycles
207/245
Unit
t
t
CPU
CPU
ns
μs