ATMEGA128A-MU Atmel, ATMEGA128A-MU Datasheet - Page 292

MCU 8BIT 128K ISP FLASH 64-QFN

ATMEGA128A-MU

Manufacturer Part Number
ATMEGA128A-MU
Description
MCU 8BIT 128K ISP FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4KB
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
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ATMEGA128A-MU
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Atmel
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203
26.2
8151H–AVR–02/11
Fuse Bits
Table 26-2.
Notes:
The ATmega128A has three fuse bytes.
of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are read as
logical zero, “0”, if they are programmed.
Table 26-3.
Notes:
Table 26-4.
M103C
WDTON
Fuse High
Byte
OCDEN
JTAGEN
SPIEN
CKOPT
BLB1 mode
Extended Fuse Byte
1
2
3
4
(1)
(1)
1. Program the fuse bits before programming the Lock bits.
2. “1” means unprogrammed, “0´means programmed
1. See
2. See
(2)
(4)
(2)
Memory Lock Bits
(5)
Lock Bit Protection Modes (Continued)
Extended Fuse Byte
Fuse High Byte
“ATmega103 and ATmega128A Compatibility” on page 4
“WDTCR - Watchdog Timer Control Register” on page 57
Bit No.
BLB12
7
6
5
4
1
1
0
0
Description
Enable OCD
Enable JTAG
Enable
Downloading
Oscillator options
BLB11
Bit No.
1
0
0
1
7
6
5
4
3
2
1
0
Serial Program and Data
Protection Type
No restrictions for SPM or (E)LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and
(E)LPM executing from the Application section is not allowed to
read from the Boot Loader section. If interrupt vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(E)LPM executing from the Application section is not allowed to
read from the Boot Loader section. If interrupt vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
Description
ATmega103 compatibility mode
Watchdog Timer always on
Table 26-3
-
Table 26-5
Default Value
1 (unprogrammed, OCD disabled)
0 (programmed, JTAG enabled)
0 (programmed, SPI prog. enabled)
1 (unprogrammed)
describe briefly the functionality
for details.
for details.
ATmega128A
Default Value
1
1
1
1
1
1
0 (programmed)
1 (unprogrammed)
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