ATMEGA128A-MU Atmel, ATMEGA128A-MU Datasheet - Page 288

• Manufacturer Part Number: ATMEGA128A-MU
• Description: MCU 8BIT 128K ISP FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA128x
• Core: AVR8
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4KB
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.8.13
8151H–AVR–02/11
ATmega128A Boot Loader Parameters
In
ming are given.
Table 25-6.
Note:
Table 25-7.
Note:
Table 25-8.
BOOTSZ1
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
PCMSB
Table 25-6
Variable
1
1
0
0
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
The different BOOTSZ fuse configurations are shown in
1. For details about these two section, see
278
SREG, temp2
BOOTSZ0
through
Boot Size Configuration
Read-While-Write Limit
Explanation of Different Variables Used in
Pointer
and
1
0
1
0
“Read-While-Write Section – RWW” on page 278
15
(3)
Table
Boot
Size
512
words
1024
words
2048
words
4096
words
Corresponding
25-8, the parameters used in the description of the self program-
Z-value
Pages
(1)
16
32
4
8
Application
Flash
Section
$0000 -
$FDFF
$0000 -
$FBFF
$0000 -
$F7FF
$0000 -
$EFFF
Description
Most significant bit in the program counter. (The
program counter is 16 bits PC[15:0])
“No Read-While-Write Section – NRWW” on page
Figure 25-3
Boot
Loader
Flash
Section
$FE00 -
$FFFF
$FC00 -
$FFFF
$F800 -
$FFFF
$F000 -
$FFFF
(2)
Figure 25-2
Pages
480
32
and the Mapping to the Z-
ATmega128A
End
Application
section
$FDFF
$FBFF
$F7FF
$EFFF
Address
$0000 - $EFFF
$F000 - $FFFF
Boot Reset
Address
(start Boot
Loader
Section)
$FE00
$FC00
$F800
$F000
288